參數(shù)資料
型號： S71GL064A08BFI0B3
廠商： SPANSION LLC
元件分類： 存儲器
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA56
封裝： 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁數(shù)： 76/134頁
文件大?。?/td> 2383K
代理商： S71GL064A08BFI0B3
44
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
The Write Buffer Programming Sequence can be aborted in the following ways:
Load a value that is greater than the page buffer size during the Number of Locations to
Program step.
Write to an address in a sector different than the one specified during the Write-Buffer-
Load command.
Write an Address/Data pair to a different write-buffer-page than the one selected by the
Starting Address during the write buffer data loading stage of the operation.
Write data other than the Confirm Command after the specified number of data load cy-
cles.
The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address location
loaded), DQ6 = toggle, and DQ5=0. A Write-to-Buffer-Abort Reset command sequence must
be written to reset the device for the next operation.
Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a
program operation is in progress.This flash device is capable of handling multiple write buffer
programming operations on the same write buffer address range without intervening erases.
For applications requiring incremental bit programming, a modified programming method is
required; please contact your local Spansion representative. Any bit in a write buffer ad-
dress range cannot be programmed from “0” back to a “1.” Attempting to do so may
cause the device to set DQ5=1, of cause the DQ7 and DQ6 status bits to indicate the opera-
tion was successful. However, a succeeding read will show that the data is still “0.” Only erase
operations can convert a “0” to a “1.”
Accelerated Program
The device offers accelerated program operations through the WP#/ACC or ACC pin depend-
ing on the particular product. When the system asserts VHH on the WP#/ACC or ACC pin. The
device uses the higher voltage on the WP#/ACC or ACC pin to accelerate the operation. Note
that the WP#/ACC pin must not be at VHH for operations other than accelerated program-
ming, or device damage may result. WP# has an internal pullup; when unconnected, WP# is
at VIH.
Figure 4 illustrates the algorithm for the program operation. Refer to the Erase and Program
timing diagrams.
相關PDF資料
PDF描述
S71GL064A08BFI0F3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B2 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0F3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08 STACKED MULTI CHIP PRODUCT FLASH MEMORY AND RAM
相關代理商/技術參數(shù)
參數(shù)描述
S71GL064A08BFI0F0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0F2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0F3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM
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