參數(shù)資料
型號(hào): SA8028
廠商: NXP Semiconductors N.V.
英文描述: 2.5 GHz sigma delta fractional-N / 760 MHz IF integer frequency synthesizers
中文描述: 2.5千兆赫Σ-Δ小數(shù)N /中頻整數(shù)760兆赫的頻率合成器
文件頁數(shù): 2/28頁
文件大?。?/td> 278K
代理商: SA8028
Philips Semiconductors
Product data
SA8028
2.5 GHz sigma delta fractional-N /
760 MHz IF integer frequency synthesizers
2
2002 Feb 22
853-2277 27777
GENERAL DESCRIPTION
The SA8028 BICMOS device integrates programmable dividers,
charge pumps and phase comparators to implement phase–locked
loops. The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at VCO input frequencies up to 2.5 GHz.
The synthesizer has fully programmable RF, IF, and reference
dividers. All divider ratios are supplied via a 3-wire serial
programming bus. The RF divider is a fractional-N divider with
programmable integer ratios from 33 to 509 and a fractional
resolution of 22 programmable bits (23 bits internal). A 2
nd
order
sigma-delta modulator is used to achieve fractional division.
Separate power and ground pins are provided to the charge pumps
and digital circuits. V
DDCP
must be equal to or greater than
V
DD
.
The ground pins should be externally connected to prevent large
currents from flowing across the die and thus causing damage.
The charge pump current (gain) is fully programmable, while I
SET
is
set by an external resistance at the R
SET
pin (refer to section 1.5,
RF and IF Charge Pumps)
.
The phase/frequency detector charge
pump outputs allow for implementing a passive loop filter.
FEATURES
Extremely low phase noise:
L
(f)
= –101 dBc/Hz at 5 kHz offset at 800 MHz
Low power
Programmable Normal & Integral charge pump outputs:
Maximum output = 10.4 mA
Digital fractional spurious compensation
Hardware and software power-down
I
DDsleep
< 0.1
μ
A (typ) at V
DD
= 3.0 V
Seperate supply for V
DD
and V
DDCP
Programmable loop filter bandwidth
APPLICATIONS
500 to 2500 MHz wireless equipment
Cellular phones, all standards including:
CDMA
: IS95-B,C WCDMA
3G
: WCDMA / UMTS
GSM
: EDGE / GPRS
TDMA
: IS136 and EDGE
GAIT
: GSM and TDMA
WLAN
Wireless PDAs
Satellite tuners and all other high frequency equipment
Extreme fine frequency resolution applications
13
7
2
3
4
5
6
TOP VIEW
1
8
9
10
11
12
14
15
16
17
18
19
20
21
22
23
24
CLOCK
REFin+
REFin–
SR02176
N/C
V
DDPre
GND
GND
Pre
RFin+
RFin–
GND
CP
P
P
G
P
I
N
D
S
P
L
T
V
D
C
V
DDCP
R
SET
Figure 1.
HBCC24 pin configuration.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SA8028W
HBCC24
Plastic, heatsink bottom chip carrier; 24 terminals; body 4 x 4 x 0.65 mm (CSP package)
SOT564-1
相關(guān)PDF資料
PDF描述
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SA8028W,518 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 2.5GHZ 760MHZ PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SA8028W,557 功能描述:鎖相環(huán) - PLL 2.5GHZ 760MHZ PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
SA8028WGE 功能描述:IC PLL FREQ SYNTHESIZER 24-HBCC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
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