參數(shù)資料
型號: SAA4998H
廠商: NXP Semiconductors N.V.
英文描述: Field and line rate converter with noise reduction and embedded memory
中文描述: 場和符合降噪和嵌入式存儲器率轉(zhuǎn)換器
文件頁數(shù): 11/39頁
文件大小: 175K
代理商: SAA4998H
2004 Feb 18
11
Philips Semiconductors
Product specification
Field and line rate converter with noise
reduction and embedded memory
SAA4998H
SAA4998H
001aaa057
1
2
3
4
5
6
7
8
9
10
11
12
13
14
20
21
22
23
24
25
80
79
78
77
76
75
74
73
72
71
70
69
68
67
61
60
59
58
57
56
15
16
17
18
19
66
65
64
63
62
26
27
28
29
30
55
54
53
52
51
3
3
3
3
3
3
3
3
3
4
4
4
4
4
5
1
9
9
9
9
9
9
9
9
9
9
8
8
8
8
4
4
4
4
4
8
8
8
8
8
TDO
TDI
TMS
TRSTN
n.c./RSTR2
ACV/RE2
n.c./WE2
V
DDP
n.c./IE2
n.c./OIE2
n.c./RSTW2
UVG0/QPIP0
UVG1/QPIP1
UVG2/QPIP2
n.c./SWCK2
V
SSE
n.c./LLC
UVG3/QPIP3
UVG4/QPIP4
UVG5/QPIP5
UVG6/QPIP6
UVG7/QPIP7
YG0/DPIP0
YG1/DPIP1
YG2/DPIP2
YG3/DPIP3
V
SSE
V
DDE
YG4/DPIP4
YG5/DPIP5
Y
V
S
V
D
V
S
V
D
Y
V
U
U
V
D
V
S
U
U
V
S
V
D
V
S
V
D
C
V
S
U
V
DDS
V
SSS
UVA6
UVA7
YA0
YA1
YA2
YA3
YA4
YA5
YA6
YA7
REA
IE
V
DDD
V
SSD
REF
YF7
YF6
V
SSE
YF5
YF4
YF3
YF2
YF1
YF0
V
DDE
UVF7
UVF6
UVF5
T
R
S
S
V
D
P
V
S
V
D
V
S
V
D
S
U
U
U
U
U
U
V
D
V
S
T
Fig.3 Pin configuration.
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