參數(shù)資料
型號: SAA4998H
廠商: NXP Semiconductors N.V.
英文描述: Field and line rate converter with noise reduction and embedded memory
中文描述: 場和符合降噪和嵌入式存儲器率轉(zhuǎn)換器
文件頁數(shù): 31/39頁
文件大小: 175K
代理商: SAA4998H
2004 Feb 18
31
Philips Semiconductors
Product specification
Field and line rate converter with noise
reduction and embedded memory
SAA4998H
Notes
1.
All inputs except inputs with internal pull-up or pull-down resistor. These inputs have an absolute leakage current of
maximum 50
μ
A.
Timing characteristics are measured with C
L
= 15 pF.
All inputs except SNERT interface inputs, CLK32 input and BST/TEST inputs.
2.
3.
BST interface;
see Fig.6
T
cy(BST)
t
su(i)(BST)
t
h(i)(BST)
t
h(o)(BST)
t
d(o)(BST)
SNERT interface;
see Fig.7
BST cycle time
input set-up time
input hold time
output hold time
output delay
3
6
4
1
30
μ
s
ns
ns
ns
ns
t
SNRST(H)
t
d(SNRST-SNCL)
delay SNRST pulse to SNCL LOW
time
T
cy(SNCL)
SNCL cycle time
t
su(i)(SNCL)
input set-up time to SNCL
t
h(i)(SNCL)
input hold time to SNCL
t
h(o)
output hold time
t
d(o)
output delay
t
o(en)
output enable time
SNRST pulse HIGH time
500
200
ns
ns
0.5
53
10
30
210
1
330
μ
s
ns
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
stable power supply
RST
coc003
CLK32
10 cycles of CLK32
Fig.4 Timing for RST input.
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