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參數(shù)資料
| 型號： | SAA6713H |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | XGA dual input flat panel controller |
| 中文描述： | 雙輸入的XGA液晶控制器 |
| 文件頁數(shù)： | 43/103頁 |
| 文件大小： | 521K |
| 代理商： | SAA6713H |
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2004 Apr 05
43
Philips Semiconductors
Product specification
XGA dual input flat panel controller
SAA6713H
handbook, full pagewidth
MHC214
÷
2
CLK
PLL
clock
PRE-DIVIDER
pll_pre_div_en
pll_pre_div[15:0]
FREQUENCY
AND
PHASE
DETECTOR
OSCILLATOR
50 to 320 MHz
pll_en
m-DIVIDER
pll_m_div[1:0]
n-DIVIDER
pll_n_div[11:0]
Fig.7 PLL block diagram.
7.5
Synchronization pulse distribution
The line-locked PLL, input interface and mode detection
are provided with horizontal and vertical synchronization
pulse signals (HSYNC and VSYNC). Signal switching is
controlled by configuration registers SYNC_SEL (18H at
page 0) and SYNC_DIS (19H at page 0). A composite
sync decoder and hsync regeneration can be inserted.
Possible selections and the concerned configuration
parameters are shown in Fig.8 and described more
detailed in the Sections 7.5.1 to 7.5.5.
7.5.1
C
OMPOSITE SYNC INPUT
The composite sync decoder input is selected by
cs_dvi_de and sog_en. This allows to input the separated
SOG provided by the sync-on-green slicer, a composite
sync applied at input pin HSYNC or data enable DVI_DE
decoded from the DVI stream (see Table 22). The
sync-on-green slicer has to be enabled by setting
sync_on_green_en in register ADC_CTRL (00H at
page 1) to logic 1.
To provide a stable hsync during the vsync, the
sync-on-green slicer might have to be disabled during the
vsync which is performed automatically if sog_vs_disable
is set to logic 1; otherwise the sync-on-green slicer is
constantly enabled.
The composite sync decoder will regenerate hsync and
vsync signals for internal use. Figure 9 shows the
composite sync modes that can be used. The maximum
number of equalizing pulses (csync-3 and csync-4) may
not exceed 30.
Table 22
Composite sync decoder input selection; note 1
Note
1.
X = don’t care.
cs_dvi_en
sog_en
CSYNC
1
0
0
X
1
0
DVI_DE
SOG
HSYNC
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| SAA6713H/V1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller |
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| SAA6750 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
| SAA6750H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
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