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參數(shù)資料
| 型號： | SAA7104E |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital video encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PBGA156 |
| 封裝： | 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT-472-1, BGA-156 |
| 文件頁數(shù)： | 33/70頁 |
| 文件大小： | 360K |
| 代理商： | SAA7104E |
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2004 Mar 04
33
Philips Semiconductors
Product specification
Digital video encoder
SAA7104E; SAA7105E
Table 37
Subaddress 3AH
Table 38
Subaddress 54H
Table 39
Subaddresses 55H to 59H
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
CBENB
0
1
0
data from input ports is encoded
colour bar with fixed colours is encoded
in slave mode, the encoder is only synchronized at the beginning of an odd field; default
after reset
in slave mode, the encoder receives a vertical sync signal
horizontal and vertical trigger is taken from FSVGC or both VSVGC and HSVGC; default
after reset
horizontal and vertical trigger is decoded out of “ITU-R BT.656”compatible data at PD port
Y-C
B
-C
R
to RGB dematrix is active; default after reset
Y-C
B
-C
R
to RGB dematrix is bypassed
pin HSM_CSYNC provides a horizontal sync for non-interlaced VGA components output
(at PIXCLK)
pin HSM_CSYNC provides a composite sync for interlaced components output (at XTAL
clock)
input luminance data is twos complement from PD input port
input luminance data is straight binary from PD input port; default after reset
input colour difference data is twos complement from PD input port
input colour difference data is straight binary from PD input port; default after reset
SYNTV
1
0
SYMP
1
0
1
0
DEMOFF
CSYNC
1
Y2C
0
1
0
1
UV2C
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
VPSEN
0
1
0
1
0
1
0
1
0
1
video programming system data insertion is disabled; default after reset
video programming system data insertion in line 16 is enabled
pin VSM provides a LOW level if GPEN = 1
pin VSM provides a HIGH level if GPEN = 1
pin VSM provides a vertical sync for a monitor; default after reset
pin VSM provides a constant signal according to GPVAL
input data is sampled with inverse clock edges
input data is sampled with the clock edges specified in Tables 9 to 14; default after reset
normal assignment of the input data to the clock edge; default after reset
correct time misalignment due to inverted assignment of input data to the clock edge
GPVAL
GPEN
EDGE
SLOT
DATA BYTE
DESCRIPTION
REMARKS
VPS5
VPS11
VPS12
VPS13
VPS14
fifth byte of video programming system data
eleventh byte of video programming system data
twelfth byte of video programming system data
thirteenth byte of video programming system data
fourteenth byte of video programming system data
in line 16; LSB first; all other bytes are not
relevant for VPS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7105E | Digital video encoder |
| SAA7104H | GT 38C 38#12 PIN PLUG |
| SAA7105H | Digital video encoder |
| SAA7105H | Digital video encoder |
| SAA7108 | PC-CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7104H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7105E | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7105E/V1/G | 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7105E/V1/G,518 | 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7105E/V1/G,557 | 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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