參數(shù)資料
型號: SAA8115HL
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Digital Camera USB Interface(數(shù)字照相USB接口)
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-486-1, LQFP-144
文件頁數(shù): 13/56頁
文件大?。?/td> 177K
代理商: SAA8115HL
2000 Jan 27
13
Philips Semiconductors
Preliminary specification
Digital camera USB interface
SAA8115HL
8.5
Transfer buffer
The transfer buffer module (see Fig.4) takes care of a
smooth transfer of the data to the FIFO of the USB.
Moreover the transfer buffer can insert inband
synchronization words in the video data stream. This
function can be switched on and off with
INBAND_CONTROL in register VP_TR_CONTROL
(0x36). The synchronization words can only be used with
non-compressed data stream and are formatted like
0x00 0xFF 0x<framecounter>
7
<linecounter>
9
.
(Subscript denotes the number of bits and the frame
counter is circular incrementing).
The non-compressed data is formatted like:
4 : 2 : 0: <optional sync word><Y0><Y1><Y2><Y3>
<C0><C2><Y4><Y5><Y6><Y7><C4><C6>....,
4 : 2 : 2: <optional sync word><Y0><Y1><Y2><Y3>
<U0><V0><U2><V2><Y4>....,
where C denotes U-data in the even lines (0, 2, 4 etc.) and
V-data in the odd lines (1, 3, 5 etc.).
8.6
USB video FIFO
The USB video FIFO is programmed via the I
2
C-bus
(see Fig.5). The FIFO is designed to achieve three
differentpacketscontainingvideoontheisochronousUSB
channel.Videodataiscontainedinachainofequallysized
USB packets, except for the last packet of a video frame
which is always smaller. The video frames can be
separated from each other by one or more 0-length
packets. For low frame rates (below 10 frames per
second) there are always 0-length packets in the stream.
The host can synchronize on the smaller packets for the
high frame rates and on the 0-length packets for the low
frame rates.
For every mode the FIFO must be adjusted. There are
three parameters to program the video FIFO:
PACKET_SIZE (0x06): this value indicates the length of
all packets with video data except for the last packet of
a video frame
FIFO_OFFSET (0x04): this value indicates the number
of data in the FIFO before a new packet will be
transmitted over USB
READ_SPACING (0x07): this value indicates the
number of 12 MHz clock cycles between read actions
from the FIFO.
Moreover the FIFO is enabled and disabled with
FIFO_ACTIVE (0x05).
The write process to the FIFO is controlled by the transfer
buffer and not programmable.
The read process is executed in the PSIE-MMU and is
driven by the USB frame interval (1 ms). Every frame
interval the PSIE-MMU tries to read PACKET_SIZE bytes
from the FIFO. This read process will not be started when
a new video frame is stored in the FIFO and there are less
thanFIFO_OFFSETbyteswritten.Thereadprocessstops
if the next bytes are of another video frame, or if the
read-pointer would overtake the write-pointer.
READ_SPACING determines the read rate. Its value can
easily be determined with the formula:
READ_SPACING
PACKET_SIZE
------------12000
<
handbook, full pagewidth
WRITE
SYNC
FIFO
Ptr_to_start_Vframe
write
read
read
enable
data to PSIE-MMU
FCE431
data from transfer buffer
FIFO_OFFSET
READ_SPACING
FIFO_ACTIVE
PACKET_SIZE
Fig.4 USB video FIFO.
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