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參數資料
| 型號： | SAA8115HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Digital Camera USB Interface(數字照相USB接口) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-486-1, LQFP-144 |
| 文件頁數： | 14/56頁 |
| 文件大?。?/td> | 177K |
| 代理商： | SAA8115HL |
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2000 Jan 27
14
Philips Semiconductors
Preliminary specification
Digital camera USB interface
SAA8115HL
8.7
PSIE-MMU, I
2
C-bus interface and USB RAM
space
The Programmable Serial Interface Engine (PSIE) and
Memory Management Unit (MMU) is the heart of the USB
protocol hardware (see Fig.5). It formats the actual
packets that are transferred to the USB and passes the
incoming packets to the right end-point buffers. These
buffers are allocated as part of the USB RAM space.
ThemicrocontrollercommunicatesviatheI
2
C-buswiththe
PSIE-MMU. The I
2
C-bus protocol distinguishes three
register spaces. These spaces are addressed via different
commands. The command is sent to the command
address.
Depending on the command it is sent to the PSIE-MMU
and/or to the command interpreter which configures the
(de-)mux to open the path to the right register space.
Subsequent write/reads to/from the data address store or
retrieve data from the register space selected by the
command.
8.8
ATX interface
The SAA8115HL contains an analog bus driver, called the
ATX. It incorporates a differential and two single-ended
receivers and a differential transmitter.
The interface to the bus consists of a differential data pair
(ATXDM and ATXDP).
handbook, full pagewidth
PI_Address
+
0X
PI_Address
+
10
to/from
microcontroller
I
2
C-BUS
INTERFACE
COMMAND
INTERPRETER
(DE)MUX
to
PSIE-MMU
PSIE-MMU
REGISTER
SPACE
SET MODE
REGISTER
SPACE
NON USB
AND
VIDEO FIFO
REGISTERS
FCE432
Fig.5 I
2
C-bus interface and register map.
8.9
Audio
The SAA8115HL contains a microphone supply and an
amplifier circuit composed of two stages: a Low Noise
Amplifier (LNA)andavariablegainamplifier.TheLNAhas
a fixed gain of 26 dB while the variable gain amplifier can
be programmed between 0 and 30 dB by steps of 2 dB.
The gain control can be done via either the SNERT
interface or the I
2
C-bus interface (see Table 57).
The serial interface must be first selected using bit SIS
(see Table 57). The frequency transfer characteristic of
the audio path must be controlled via external high-pass or
low-pass filters.
The PLL converts the 48 MHz to 256f
s
(f
s
= audio sample
frequency). There are three modes for the PLL to achieve
the sample frequencies of 48, 44.1 or 32 kHz
(see Table 2).
The bitstream ADC samples the audio signal. It runs at an
oversample rate of 256 times the base sample rate. In the
application, the bitstream can be converted to parallel
16-bit samples. This conversion is programmable with
respect to the effective sample frequency (dropping
sample results in a lower effective sample frequency) and
sample resolution. As a result the effective sample rate
can be determined.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SAA8116 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital PC-camera signal processor including microcontroller and USB interface |
| SAA8116104BE | 功能描述:數字信號處理器和控制器 - DSP, DSC PC WEB CAMERA DSP WITH USB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| SAA8116104BE-S | 功能描述:數字信號處理器和控制器 - DSP, DSC PC WEB CAMERA DSP WITH USB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| SAA8116104BE-T | 功能描述:數字信號處理器和控制器 - DSP, DSC PC WEB CAMERA DSP WITH USB RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| SAA8116ET | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital PC-camera signal processor including microcontroller and USB interface |
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