參數資料
型號： SAH-XC2387A-104F80L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-144
文件頁數： 40/141頁
文件大?。?/td> 1795K
代理商： SAH-XC2387A-104F80L
XC2385A, XC2387A
XC2000 Family / Base Line
Electrical Parameters
Data Sheet
134
V2.1, 2011-07
Debug via JTAG
The following parameters are applicable for communication through the JTAG debug
interface. The JTAG module is fully compliant with IEEE1149.1-2000.
Note: These parameters are not subject to production test but verified by design and/or
characterization.
Note: Operating Conditions apply;
C
L=20 pF.
Table 40
JTAG Interface Timing for Upper Voltage Range
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
TCK clock period
t
1 SR
50
1)
1) The debug interface cannot operate faster than the overall system, therefore
t
1 ≥ tSYS.
ns
2)
2) Under typical conditions, the interface can operate at transfer rates up to 20 MHz.
TCK high time
t
2 SR
16
ns
TCK low time
t
3 SR
16
ns
TCK clock rise time
t
4 SR
8ns
TCK clock fall time
t
5 SR
8ns
TDI/TMS setup to TCK
rising edge
t
6 SR
6
ns
TDI/TMS hold after TCK
rising edge
t
7 SR
6
ns
TDO valid from TCK falling
edge (propagation delay)
3)
3) The falling edge on TCK is used to generate the TDO timing.
t
8 CC
25
29
ns
TDO high impedance to
valid output from TCK
falling edge
4) The setup time for TDO is given implicitly by the TCK cycle time.
t
9 CC
25
29
ns
TDO valid output to high
impedance from TCK
falling edge
t
10 CC
25
29
ns
TDO hold after TCK falling
edge
t
18 CC
5
ns
相關PDF資料
PDF描述
SAH-XC2387C-200F100L 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
SAH-XC2387C-136F100L 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
SAH-XC2387C-104F100L 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
SAF-XC2387C-200F80L 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP144
SAF-XC2387C-200F100L 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
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