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參數(shù)資料
| 型號： | SAH-XC2712X-8F66R |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PDSO38 |
| 封裝： | 0.50 MM PITCH, GREEN, PLASTIC, TSSOP-38 |
| 文件頁數(shù)： | 47/103頁 |
| 文件大?。?/td> | 2957K |
| 代理商： | SAH-XC2712X-8F66R |
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XC2712X
XC2000 Family / Compact Line
Functional Description
PRELIMINARY
Data Sheet
44
V1.0, 2010-12
3.16
Parallel Ports
The XC2712X provides up to 28 I/O lines which are organized into 3 input/output ports
and 1 input port. All port lines are bit-addressable, and all input/output lines can be
individually (bit-wise) configured via port control registers. This configuration selects the
direction (input/output), push/pull or open-drain operation, activation of pull devices, and
edge characteristics (shape) and driver characteristics (output current) of the port
drivers. The I/O ports are true bidirectional ports which are switched to high impedance
state when configured as inputs. During the internal reset, all port pins are configured as
inputs without pull devices active.
All port lines have alternate input or output functions associated with them. These
alternate functions can be programmed to be assigned to various port pins to support the
best utilization for a given application. For this reason, certain functions appear several
times in Table 10.
All port lines that are not used for alternate functions may be used as general purpose
I/O lines.
Table 10
Summary of the XC2712X’s Ports
Group
Width
I/O
Connected Modules
P2
9
I/O
Analog inputs, ADC, CC2, DAP/JTAG, GPT12E, SCU,
USIC
P5
5
I
Analog inputs, CCU6, JTAG, GPT12E
P6
2
I/O
Analog inputs, ADC, JTAG, GPT12E
P10
12
I/O
CCU6, GPT12E, DAP/JTAG, SPD, USIC
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