t SPO
參數資料
型號: SAK-XC2237M-104F40L
廠商: Infineon Technologies
文件頁數: 84/107頁
文件大?。?/td> 0K
描述: IC MCU 16BIT 320KB FLASH 64LQFP
標準包裝: 1,900
系列: XC22xxM
核心處理器: C166SV2
芯體尺寸: 16/32-位
速度: 40MHz
連通性: CAN,EBI/EMI,I²C,LIN,SPI,SSC,UART/USART,USI
外圍設備: I²S,POR,PWM,WDT
輸入/輸出數: 38
程序存儲器容量: 832KB(832K x 8)
程序存儲器類型: 閃存
RAM 容量: 50K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數據轉換器: A/D 9x10b
振蕩器型: 內部
工作溫度: -40°C ~ 125°C
封裝/外殼: 64-LQFP
包裝: 帶卷 (TR)
其它名稱: SP000720382
XC2238M, XC2237M
XC2000 Family / Base Line
Electrical Parameters
Data Sheet
78
V2.1, 2011-07
Conditions for
t
SPO Timing Measurement
The time required for the transition from Power-On to Base mode is called
t
SPO. It is
measured under the following conditions:
Precondition: The pad supply is valid, i.e.
V
DDPB is above 3.0 V and remains above 3.0 V
even though the XC223xM is starting up. No debugger is attached.
Start condition: Power-on reset is removed (PORST = 1).
End condition: External pin toggle caused by first user instruction executed from FLASH
after startup.
Conditions for
t
SSO Timing Measurement
The time required for the transition from Stopover to Stopover Waked-Up mode is
called
t
SSO. It is measured under the following conditions:
Precondition: The Stopover mode has been entered using the procedure defined in the
Programmer’s Guide.
Start condition: Pin toggle on ESR pin triggering the startup sequence.
End condition: External pin toggle caused by first user instruction executed from PSRAM
after startup.
Coding of bit fields LEVxV in SWD and PVC Configuration Registers
3)
f
WU in MHz
4) This value includes a hysteresis of approximately 50 mV for rising voltage.
5)
V
LV = selected SWD voltage level
6) The limit
V
LV - 0.10 V is valid for the OK1 level. The limit for the OK2 level is VLV - 0.15 V.
Table 21
Coding of bit fields LEVxV in Register SWDCON0
Code
Default Voltage Level
Notes
1)
0000
B
2.9 V
0001
B
3.0 V
LEV1V: reset request
0010
B
3.1 V
0011
B
3.2 V
0100
B
3.3 V
0101
B
3.4 V
0110
B
3.6 V
0111
B
4.0 V
1000
B
4.2 V
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