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參數(shù)資料
| 型號： | SC16C2552BIA44,518 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 36/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART DUAL SOT187-2 |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 特點(diǎn)： | 2 通道 |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 電源電壓： | 2.5V，3.3V，5V |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 935274408518 SC16C2552BIA44-T SC16C2552BIA44-T-ND |
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SC16C2552B_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 12 February 2009
8 of 38
NXP Semiconductors
SC16C2552B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
When two interrupt conditions have the same priority, it is important to service these
interrupts correctly. Receive Data Ready and Receive Time-Out have the same interrupt
priority (when enabled by IER[0]). The receiver issues an interrupt after the number of
characters have reached the programmed trigger level. In this case, the SC16C2552B
FIFO may hold more characters than the programmed trigger level. Following the removal
of a data byte, the user should re-check LSR[0] for additional characters. A Receive
Time-Out will not occur if the receive FIFO is empty. The time-out counter is reset at the
center of each stop bit received or each time the receive holding register (RHR) is read.
The actual time-out value is 4 character time.
6.5 Programmable baud rate generator
The SC16C2552B supports high speed modem technologies that have increased input
data rates by employing data compression schemes. For example, a 33.6 kbit/s modem
that employs data compression may require a 115.2 kbit/s input data rate. A 128.0 kbit/s
ISDN modem that supports data compression may need an input data rate of 460.8 kbit/s.
A baud rate generator is provided for each UART channel, allowing independent TX/RX
channel control. The programmable Baud Rate Generator (BRG) is capable of accepting
an input clock up to 80 MHz, as required for supporting a 5 Mbit/s data rate. The
SC16C2552B can be congured for internal or external clock operation. For internal clock
oscillator operation, an industry standard microprocessor crystal is connected externally
between the XTAL1 and XTAL2 pins. Alternatively, an external clock can be connected to
the XTAL1 pin to clock the internal baud rate generator for standard or custom rates (see
Table 5).
The generator divides the input 16
× clock by any divisor from 1 to (216 1). The
SC16C2552B divides the basic external clock by 16. The basic 16
× clock provides table
rates to support standard and custom applications using the same system design. The
rate table is congured via the DLL and DLM internal register functions. Customized baud
rates can be achieved by selecting the proper divisor values for the MSB and LSB
sections of baud rate generator.
Programming the baud rate generator registers DLM (MSB) and DLL (LSB) provides a
user capability for selecting the desired nal baud rate. The example in Table 5 shows the
selectable baud rate table available when using a 1.8432 MHz external clock input.
Fig 3.
Crystal oscillator connection
002aab325
C2
33 pF
XTAL1
XTAL2
X1
1.8432 MHz
C1
22 pF
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|---|---|
| SC16C2552BIA44-T | 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C2552CIA44,512 | 制造商:NXP Semiconductors 功能描述: 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/TUBEDP// - Rail/Tube |
| SC16C2552CIA44,518 | 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/REEL13DP// - Tape and Reel |
| SC16C2552CIA44,529 | 制造商:NXP Semiconductors 功能描述:SC16C2552CIA44/PLCC44/TUBESMDP// - Rail/Tube |
| SC16C2552IA44 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 16-byte transmit and receive FIFOs |
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