參數(shù)資料
型號: SC16C752BIBS,157
廠商: NXP Semiconductors
文件頁數(shù): 8/47頁
文件大?。?/td> 0K
描述: IC DUAL UART 64BYTE 32HVQFN
標準包裝: 2,450
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-HVQFN(5x5)
包裝: 托盤
其它名稱: 935276389157
SC16C752BIBS
SC16C752BIBS-ND
SC16C752B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 6 — 30 November 2010
16 of 47
NXP Semiconductors
SC16C752B
5 V, 2.2 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
6.6.2 Block DMA transfers (DMA mode 1)
Figure 11 shows TXRDYn and RXRDYn in DMA mode 1.
6.6.2.1
Transmitter
TXRDYn is active when there is a trigger level number of spaces available. It becomes
inactive when the FIFO is full.
6.6.2.2
Receiver
RXRDYn becomes active when the trigger level has been reached, or when a time-out
interrupt occurs. It will go inactive when the FIFO is empty or an error in the receive FIFO
is flagged by LSR[7].
6.7 Sleep mode
Sleep mode is an enhanced feature of the SC16C752B UART. It is enabled when EFR[4],
the enhanced functions bit, is set and when IER[4] is set. Sleep mode is entered when:
The serial data input line, RXn, is idle (see Section 6.8 “Break and time-out
The transmit FIFO and transmit shift register are empty.
There are no interrupts pending except THR and time-out interrupts.
Remark: Sleep mode will not be entered if there is data in the receive FIFO.
In Sleep mode, the UART clock and baud rate clock are stopped. Since most registers are
clocked using these clocks, the power consumption is greatly reduced. The UART will
wake up when any change is detected on the RXn line, when there is any change in the
state of the modem input pins, or if data is written to the transmit FIFO.
Remark: Writing to the divisor latches DLL and DLM to set the baud clock must not be
done during Sleep mode. Therefore, it is advisable to disable Sleep mode using IER[4]
before writing to DLL or DLM.
Fig 11. TXRDYn and RXRDYn in DMA mode 1
transmit
wrptr
TXRDYn
FIFO full
TXRDYn
receive
rdptr
FIFO EMPTY
RXRDYn
002aaa234
trigger
level
trigger
level
at least one
location filled
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SC16C752IB48 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with 64-byte FIFO
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