參數資料
型號: SC16C752IB48,128
廠商: NXP Semiconductors
文件頁數: 44/47頁
文件大?。?/td> 0K
描述: IC DUAL UART 64BYTE 48LQFP
標準包裝: 1
通道數: 2,DUART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 標準包裝
其它名稱: 568-5955-6
Philips Semiconductors
SC16C752
Dual UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
6 of 47
9397 750 11635
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6.
Functional description
The SC16C752 UART is pin-compatible with the SC16C2550 UART. It provides more
enhanced features. All additional features are provided through a special enhanced
feature register.
The UART will perform serial-to-parallel conversion on data characters received from
peripheral devices or modems, and parallel-to-parallel conversion on data characters
transmitted by the processor. The complete status of each channel of the SC16C752
UART can be read at any time during functional operation by the processor.
The SC16C752 can be placed in an alternate mode (FIFO mode) relieving the
processor of excessive software overhead by buffering received/transmitted
characters. Both the receiver and transmitter FIFOs can store up to 64 bytes
(including three additional bits of error status per byte for the receiver FIFO) and have
selectable or programmable trigger levels. Primary outputs RXRDY and TXRDY allow
signalling of DMA transfers.
RTSA, RTSB
33, 22
O
Request to Send (Active-LOW). These outputs are associated with individual UART
channels, A and B. A logic 0 on the RTS pin indicates the transmitter has data ready
and waiting to send. Writing a logic 1 in the modem control register MCR[1] will set this
pin to a logic 0, indicating data is available. After a reset these pins are set to a logic 1.
These pins only affect the transmit and receive operations when Auto-RTS function is
enabled via the Enhanced Feature Register (EFR[6]) for hardware ow control
operation.
RXA, RXB
5, 4
I
Receive data input. These inputs are associated with individual serial channel data to
the SC16C752. During the local loop-back mode, these RX input pins are disabled
and TX data is connected to the UART RX input internally.
RXRDYA,
RXRDYB
31, 18
O
Receive Ready (Active-LOW). RXRDYA or RXRDYB goes LOW when the trigger
level has been reached or the FIFO has at least one character. It goes HIGH when the
RX FIFO is empty.
TXA, TXB
7, 8
O
Transmit data A, B. These outputs are associated with individual serial transmit
channel data from the SC16C752. During the local loop-back mode, the TX output pin
is disabled and TX data is internally connected to the UART RX input.
TXRDYA,
TXRDYB
43, 6
O
Transmit Ready (Active-LOW). TXRDYAor TXRDYB go LOW when there are at least
a trigger level number of spaces available or when the FIFO is empty. It goes HIGH
when the FIFO is full or not empty.
VCC
42
I
Power supply input.
XTAL1
13
I
Crystal or external clock input. Functions as a crystal input or as an external clock
input. A crystal can be connected between XTAL1 and XTAL2 to form an internal
oscillator circuit (see Figure 12). Alternatively, an external clock can be connected to
this pin to provide custom data rates.
XTAL2
14
O
Output of the crystal oscillator or buffered clock. (See also XTAL1.) XTAL2 is used
as a crystal oscillator output or a buffered clock output.
Table 2:
Pin description…continued
Symbol
Pin
Type
Description
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