SCF5250 Data Sheet: Technical Data, Rev. 1.3 Freescale Se" />
參數(shù)資料
型號(hào): SCF5250LAG100
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 3/56頁(yè)
文件大?。?/td> 0K
描述: IC MPU COLDFIRE 100MHZ 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: SCF52xx
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 100MHz
連通性: EBI/EMI,I²C,IDE,MMC,SPI,UART/USART
外圍設(shè)備: DMA,I²S,POR,串行音頻,WDT
輸入/輸出數(shù): 57
程序存儲(chǔ)器類型: ROMless
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.08 V ~ 1.32 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -20°C ~ 70°C
封裝/外殼: 144-LQFP
包裝: 托盤
SCF5250 Data Sheet: Technical Data, Rev. 1.3
Freescale Semiconductor
11
Memory Stick/
Secure Digital interface
EBUIN3/CMD_SDIO2/GPIO14
Secure Digital command lane
Memory Stick interface 2 data I/O
In/Out
EBUIN2/SCLK_OUT/GPIO13
Clock out for both Memory Stick
interfaces and for Secure Digital
In/Out
DDATA0/CTS1/SDATA0_SDIO1/GPIO1 Secure Digital serial data bit 0
Memory Stick interface 1 data I/O
In/Out
SCL0/SDATA1_BS1/GPIO41
Secure Digital serial data bit 1
Memory Stick interface 1 strobe
In/Out
DDATA1/RTS1/SDATA2_BS2/GPIO2
Secure Digital serial data bit 2
Memory Stick interface 2 strobe
Reset output signal
In/Out
SDA0/SDATA3/GPIO42
Secure Digital serial data bit 3
In/Out
ADC IN
ADIN0/GPI52
ADIN1/GPI53
ADIN2/GPI54
ADIN3/GPI55
ADIN4/GPI56
ADIN5/GPI57
Analog to Digital converter input signals
In
ADC OUT
ADREF
ADOUT/SCLK4/GPIO58
Analog to digital convertor output signal.
Connect to ADREF via integrator
network.
In/Out
QSPI clock
QSPI_CLK/SUBR/GPIO25
QSPI clock signal
In/Out
QSPI data in
RCK/QSPI_DIN/QSPI_DOUT/GPIO26
QSPI data input
In/Out
QSPI data out
RCK/QSPI_DIN/QSPI_DOUT/GPIO26
QSPI_DOUT/SFSY/GPIO27
QSPI data out
In/Out
QSPI chip selects
QSPI_CS0/EBUIN4/GPIO15
QSPI_CS1/EBUOUT2/GPIO16
QSPI_CS2/MCLK2/GPIO24
CS1/QSPI_CS3/GPIO28
QSPI chip selects
In/Out
Crystal in
CRIN
Crystal input
In
Crystal out
CROUT
Crystal Out
Out
Reset In
RSTI
Processor Reset Input
In
Freescale Test Mode
TEST[2:0]
TEST pins.
In
Linear regulator output
LINOUT
outputs 1.2 V to supply core
Out
Linear regulator input
LININ
Input, typically I/O supply (3.3V)
In
Linear regulator ground
LINGND
High Impedance
HI-Z
Assertion Tri-states all output signal pins.
In
Debug Data
DDATA0/CTS1/SDATA0_SDIO1/GPIO1
DDATA1/RTS1/SDATA2_BS2/GPIO2
DDATA2/CTS0/GPIO3
DDATA3/RTS0/GPIO4
Displays captured processor data and
break-point status.
In/Out
Hi-Z
Table 2. SCF5250 Signal Index (continued)
Signal Name
Mnemonic
Function
Input/
Output
Reset
State
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