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參數(shù)資料
| 型號： | SI3220PPT0-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 44/112頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL W/SI3200 INTERFACE |
| 標準包裝： | 1 |
| 系列： | ProSLIC® |
| 主要目的： | 接口，模擬前端（AFE） |
| 已用 IC / 零件： | Si3220 |
| 已供物品： | 板，CD |
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Si3220/25 Si3200/02
Rev. 1.3
37
Not
fo
r N
ew
D
esi
gn
s
Figure 17. Ground Start VRING/IRING Behavior
3.6. Linefeed Calibration
An internal calibration algorithm corrects for internal and
external component errors. The calibration is initiated by
setting the CAL register bit. This bit automatically resets
upon completion of the calibration cycle.
A calibration should be executed following system
powerup. Upon release of the chip reset, the chipset will
be in the open state, and calibration may be initiated.
Only one calibration should be necessary if the system
remains powered up.
To optimize Dual ProSLIC performance, the calibration
routine in “AN58: Si3220/Si3225 Programmer’s Guide”
should be followed.
3.7. Loop Voltage and Current Monitoring
The Dual ProSLIC chipset continuously monitors the
TIP and RING voltages and currents. These values are
available in registers. An internal 8-bit A/D converter
samples the measured voltages and currents from the
analog sense circuitry and translates them into the
digital domain. The A/D updates the samples at an
800 Hz rate for all inputs except VRNGNG and
IRNGNG, which are sampled at 8 kHz to provide higher
resolution for zero-crossing detection in external ringing
applications. Two derived values, the loop voltage
(VTIP –VRING) and the loop current are also reported.
For ground start operation, the values reported are
VRING and the current flowing in the RING lead.
Table 21 lists the register set associated with the loop
monitoring functions.
The Dual ProSLIC chipsets also include the ability to
perform loop diagnostic functions as outlined in "3.32.2.
3.8. Power Monitoring and Power Fault
Detection
The Dual ProSLIC line monitoring functions can be
used to protect the high-voltage circuitry against
excessive power dissipation and thermal overload
conditions. The Dual ProSLIC devices can prevent
thermal overloads by regulating the total power inside
the Si3200/2 or in each of the external bipolar
transistors (if using a discrete linefeed circuit). The DSP
engine performs all power calculations and provides the
ability to automatically transition the device into the
OPEN state and generate a power alarm interrupt when
excessive power is detected. Table 22 on page 41
describes the register and RAM locations used for
power monitoring.
0 mA
-48 V
-80 V
-40 V
-20 V
-0 V
24 mA
VOCLTH
VOCHTH
640
320
VOC DELTA
I
LI
M =
24
mA
IRING
VRING
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