參數(shù)資料
型號(hào): SI3225DCX-EVB
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 48/112頁(yè)
文件大?。?/td> 0K
描述: DAUGHTER CARD W/DISCRETE INTRFC
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3225
已供物品: 板,CD
Si3220/25 Si3200/02
40
Rev. 1.3
Not
Recommended
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When the THERM pin is connected from the Si3220 or
Si3225 to the Si3200/2 (indicating the presence of an
Si3200/2), the resolution of the PTH12 and PSUM RAM
locations is modified from 498 W/LSB to 1059.6 W/
LSB. Additionally, the
THERMAL value must be modified
to accommodate the Si3200/2. For the Si3200/2,
THERMAL is typically 0.7 s, assuming the exposed pad
is connected to the recommended ground plane as
THERMAL decreases if the
PCB
layout
does
not
provide
sufficient
thermal
conduction. See “AN58: Si3220/Si3225 Programmer’s
Guide” for details.
Example calculations for PTH12 and PLPF12 in Si3200
mode are shown below:
PTH12 = Si3200/2 power threshold = 1 W (0x3B0)
PLPF12 = Si3200/2 thermal LPF pole = 2 (0x0010)
3.8.4. Automatic State Change Based on Power
Alarm
If either of the following situations occurs, the device
automatically transitions to the OPEN state:
Any of the transistor power alarm thresholds is
exceeded in the case of the discrete transistor
circuit.
The total power threshold is exceeded when using
the Si3200/2.
To provide optimal reliability, the device automatically
transitions into the open state until the user changes the
state manually, independent of whether or not the power
alarm interrupt has been masked. The PQ1E–PQ6E
bits of the IRQEN3 register enable the interrupts for
each transistor power alarm, and the PQ1S to PQ6S
bits of the IRQVEC3 register are set when a power
alarm is triggered in the respective transistor. When
using the Si3200/2, the PQ1E bit enables the power
alarm interrupt, and the PQ1S bit is set when a Si3200
power alarm is triggered.
3.8.5. Power Dissipation Considerations
The Dual ProSLIC devices rely on the Si3200/2 to
power the line from the battery supply. The PCB layout
and enclosure conditions should be designed to allow
sufficient thermal dissipation out of the Si3200/2, and a
programmable power alarm threshold ensures product
safety under all operating conditions. See "3.8. Power
more details on power alarm considerations.
The Si3200/2’s thermally-enhanced SOIC-16 package
offers an exposed pad that improves thermal dissipation
out of the package when soldered to a topside PCB pad
connected to inner power planes. Using appropriate
layout practices, the Si3200/2 can provide thermal
performance of 55 °C/W. The exposed path should be
connected to a low-impedance ground plane via a
topside PCB pad directly under the part. See package
outlines for PCB pad dimensions. In addition, an
opposite-side PCB pad with multiple vias connecting it
to the topside pad directly under the exposed pad will
further improve the overall thermal performance of the
system. Refer to “AN55: Dual ProSLIC User Guide” for
optimal thermal dissipation layout guidelines.
The Dual ProSLIC chipset is designed with the ability to
source long loop lengths in excess of 18 kft but can also
accommodate short loop configurations. For example,
the Si3220 can operate from one of two battery supplies
depending on the operating state. When in the on-hook
state, the on-hook loop feed is generated from the
ringing battery supply, generally –70 V or more. Once
the SLIC transitions to the off-hook state, a lower off-
hook battery supply (typically –24 V) supplies the
required current to power the loop if the loop length is
sufficiently short to accommodate the lower battery
supply. This battery switching method allows the SLIC
chipset to dissipate less power than when operating
from a –70 V battery supply. See “3.9. Automatic Dual
Battery Switching” for more details.
In long loop applications, there is generally a single
battery supply (e.g., –48 V) available for powering the
loop in the off-hook state. When sourcing loop lengths
similar to the maximum specified service distance (e.g.,
18 kft.), most of the power is dissipated in the
impedance of the line. SLICs used in long-loop
applications must also be able to provide phone service
to customers who are located much closer to the line
card than the maximum loop length specified for the
system. This situation may cause substantial power to
be dissipated inside the SLIC chipset. A special power
offload
circuit
is
recommended
for
single-battery
extended-loop applications. Refer to “AN91: Si3200
Power Off-load Circuit” for power offload circuit usage
guidelines.
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