參數(shù)資料
型號: SI3230MPPQX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 76/108頁
文件大小: 0K
描述: BOARD EVAL W/DISCRETE INTERFACE
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3230
已供物品: 板,CD
Si3230
Preliminary Rev. 0.96
7
Not
Recommended
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Figure 1. Overload Compression Performance
Table 4. Linefeed Characteristics
(VDDA, VDDD = 3.13 to 5.25 V, TA = 0 to 70°C for K-Grade, –40 to 85°C for B-Grade)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Loop Resistance Range
RLOOP
See note.*
0
160
DC Loop Current Accuracy
ILIM = 29 mA, ETBA = 4 mA
–10
10
%
DC Open Circuit Voltage
Accuracy
Active Mode; VOC = 48 V,
VTIP – VRING
–4
4
V
DC Differential Output
Resistance
RDO
ILOOP < ILIM
—160
DC Open Circuit Voltage—
Ground Start
VOCTO
IRING<ILIM; VRING wrt ground
VOC = 48 V
–4
4
V
DC Output Resistance—
Ground Start
RROTO
IRING<ILIM; RING to ground
160
DC Output Resistance—
Ground Start
RTOTO
TIP to ground
150
k
Loop Closure/Ring Ground
Detect Threshold Accuracy
ITHR = 11.43 mA
–20
20
%
Ring Trip Threshold
Accuracy
ITHR = 40.64 mA
–10
10
%
Ring Trip Response Time
User Programmable Register 70
and Indirect Register 36
———
Ring Amplitude
VTR
5 REN load; sine wave;
RLOOP = 160 VBAT = –75 V
44
Vrms
Ring DC Offset
ROS
Programmable in Indirect
Register 19
0—
V
123456789
1
2
3
4
5
6
7
8
9
0
2.6
Acceptable
Region
Fundamental Input Power (dBm0)
Fundamental
Output Power
(dBm0)
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