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參數(shù)資料
| 型號： | SI3452D-B01-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 5/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POE CONTROLLER MIDSPAN 40QFN |
| 特色產(chǎn)品： | Si3452 Quad High-Voltage Port Controller for PoE and PoE+PSEs |
| 標準包裝： | 50 |
| 控制器類型： | 以太網(wǎng)供電控制器（POE） |
| 接口： | I²C |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 14mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-QFN（6x6） |
| 包裝： | 管件 |
| 配用： | SMARTPSE24-KIT-ND - KIT EVAL REF 24PORT SPI/UART |
| 其它名稱： | 336-1835-5 |
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Si3452
Rev. 1.3
13
4.2. Classification
Following a successful PD detection, the classification phase will be automatically initiated in all operational
modes. During this phase, a single measurement will be made at 18 V to determine how much power the PD
device will draw under maximum loads per the IEEE 802.3af and 802.3at standards. The current limit during this
test mode is 60 mA nominal.
The Si3452 supports 1-Event and 2-Event classification. When operating in PoE (<15.4 W) mode, 1-Event
classification is used. Operation in PoE+ (>15.4 W) mode results in 2-Event classification probes. The 1-Event
classification is compliant to IEEE standard 802.3-2005. 2-Event classification is compliant to draft IEEE P802.3at.
4.3. Port Turn-On and Power FETs
The FET is turned on with a gate drive that results in a very low-noise turn-on waveform with a slew rate of less
than 1 V/sec (See Figure 5).
The power FET switch on each port has been sized to have a typical ON resistance of approximately 0.3
. The
shunt resistor for current measurement has also been set to 0.1
. Including interconnection and process variation,
the total resistance to VEE for a port that is on is 0.6
(max). This limits the maximum power dissipation per
channel to < 250 mW when the operating current is 600 mA, the maximum current allowed by the IEEE 802.3at
PoE+ standard.
The FET has a programmable operating current limit. Each channel can be set to support output currents of
400 mA or 800 mA minimum.
In addition to the normal current limit, there is a short circuit current shutdown approximately 25% greater than the
nominal current limit. If there is a transient current surge where the current ramps up faster than the programmed
current limit can respond, the gate drive voltage is clamped immediately to VEE. The clamp is enabled for at least
10 s, which allows the normal current circuitry to respond.
Another important protection feature is foldback current limiting. When VOUT is near VEE, the current limit is at
maximum. As the VDS of the driver switch increases (and VOUT is closer to ground), the current limit goes to its
lowest level. The amount of the foldback current is scaled proportionally with the programmed current limit.
Figure 5. Turn-On Waveform—Vport Relative to GND
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI3452D-B01-GMR | 功能描述:熱插拔功率分布 Quad PoE+ PSE Port Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| SI3452D-B02-GM | 制造商:Silicon Laboratories Inc 功能描述:QUAD HIGH-VOLTAGE PORT CONTROLLER FOR POE AND POE+ PSES 制造商:Silicon Laboratories Inc 功能描述:QUAD POE+ PSE PORT CONTROLLER (AUTO, MIDSPAN, DV/DT DISCONNE - Trays 制造商:Silicon Laboratories Inc 功能描述:IC POE PSE PORT CTLR QUAD 40QFN 制造商:Silicon Laboratories Inc 功能描述:Quad PoE+ PSE Port Controller 制造商:Silicon Laboratories 功能描述:QUAD HIGH-VOLTAGE PORT CONTROLLER FOR POE AND POE+ PSES |
| SI3452D-B02-GMR | 制造商:Silicon Laboratories Inc 功能描述:QUAD POE+ PSE PORT CONTROLLER (AUTO, MIDSPAN, DV/DT DISCONNE - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC POE PSE PORT CTLR QUAD 40QFN 制造商:Silicon Laboratories Inc 功能描述:Quad PoE+ PSE Port Controller |
| Si3452MS8-KIT | 功能描述:電源管理IC開發(fā)工具 8-Port PoE/PoE+ Midspan PSE Eval Kit RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| SI3453 | 制造商:SILABS 制造商全稱:SILABS 功能描述:QUAD HIGH-VOLTAGE PORT CONTROLLER FOR POE AND POE PSES |
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