參數(shù)資料
型號(hào)： SI4123-D-GT
廠商： Silicon Laboratories Inc
文件頁數(shù)： 11/36頁
文件大?。?/td> 0K
描述： IC SYNTHESIZER RF1/IF 24TSSOP
標(biāo)準(zhǔn)包裝： 62
類型： 頻率合成器
PLL： 是
輸入： 時(shí)鐘
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 1:2
差分 - 輸入:輸出： 無/無
頻率 - 最大： 1.8GHz
除法器/乘法器： 是/無
電源電壓： 2.7 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 管件
其它名稱： 336-1175
Si4133
Rev. 1.61
19
3.7. RF and IF Outputs
The RFOUT and IFOUT pins are driven by amplifiers
that buffer the RF VCOs and IF VCO respectively. The
RF output amplifier receives its input from the RF1 or
RF2 VCO, depending on which R- or N-Divider register
is written last. For example, programming the N-Divider
register for RF1 automatically selects the RF1 VCO
output.
Figures 13 and 14 show application diagrams for the
Si4133. The RF output signal must be ac coupled to its
load through a capacitor. An external inductance
between the RFOUT pin and the ac coupling capacitor
is required as part of an output matching network to
maximize power delivered to the load. This 2 nH
inductance can be realized with a PC board trace. The
network is made to provide an adequate match to an
external 50
load for both the RF1 and RF2 frequency
bands. The matching network also filters the output
signal to reduce harmonic distortion.
The IFOUT pin must also be ac coupled to its load
through a capacitor. The IF output level is dependent
upon the load. Figure 18 on page 20 displays the output
level versus load resistance for a variety of output
frequencies. For resistive loads greater than 500
the
output level saturates and the bias currents in the IF
output amplifier are higher than required. The LPWR bit
in the Main Configuration register (Register 0) can be
set to 1 to reduce the bias currents and therefore reduce
the power dissipated by the IF amplifier. For loads less
than 500
LPWR should be set to 0 to maximize the
output level.
For IF frequencies greater than 500 MHz, a matching
network is required to drive a 50
load. See Figure 16.
The value of LMATCH can be determined from Table 10.
Figure 16. IF Frequencies > 500 MHz
For frequencies less than 500 MHz, the IF output buffer
can directly drive a 200
resistive load or higher. For
resistive loads greater than 500
(f < 500 MHz) the
LPWR bit can be set to reduce the power consumed by
the IF output buffer. See Figure 17.
Figure 17. IF Frequencies < 500 MHz
3.8. Reference Frequency Amplifier
The Si4133 provides a reference frequency amplifier. If
the driving signal has CMOS levels it can be connected
directly to the XIN pin. Otherwise, the reference
frequency signal should be ac coupled to the XIN pin
through a 560 pF capacitor.
3.9. Powerdown Modes
Table 11 summarizes the powerdown functionality. The
Si4133 can be powered down by taking the PWDN pin low
or by setting bits in the Powerdown register (Register 2).
When the PWDN pin is low, the Si4133 is powered down
regardless of the Powerdown register settings. When the
PWDN pin is high, power management is in control of the
Powerdown register bits.
The IF and RF sections of the Si4133 circuitry can be
individually powered down by setting the Powerdown
register bits PDIB and PDRB low, respectively. The
reference frequency amplifier is also powered up if the
PDRB and PDIB bits are high. Also, setting the AUTOPDB
bit to 1 in the Main Configuration register (Register 0) is
equivalent to setting both bits in the Powerdown register to
1.
The serial interface remains available and can be written in
all powerdown modes.
Table 10. LMATCH Values
Frequency
LMATCH
500–600 MHz
40 nH
600–800 MHz
27 nH
800 MHz–1 GHz
18 nH
IFOUT
L
MATCH
560 pF
50
IFO UT
>500 pF
>200
相關(guān)PDF資料
PDF描述
SI4123-D-GM IC SYNTHESIZER RF1/IF 28QFN
SI4122-D-GT IC SYNTHESIZER RF2/IF 24TSSOP
SI4113-D-GT IC SYNTHESIZER RF1/RF2 24TSSOP
SI4122-D-GM IC SYNTH RF2/IF SNGL-BAND 28MLP
SI4113-D-GM IC SYNTHESIZER RF-ONLY 28MLP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI4123-D-GTR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Single-Band RF Synthesizer RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SI4123-EVB 功能描述:射頻開發(fā)工具 Single-Band RF Synth (RF1/IF) Eval TSSOP RoHS:否 制造商:Taiyo Yuden 產(chǎn)品:Wireless Modules 類型:Wireless Audio 工具用于評估:WYSAAVDX7 頻率: 工作電源電壓:3.4 V to 5.5 V
SI4123G 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL-BAND RF SYNTHESIZER WITH INTEGRATED VCOS FOR GSM AND GPRS WIRELESS COMMUNICATIONS
SI4123G-BM 制造商:Silicon Laboratories Inc 功能描述:
SI4123G-BMR 功能描述:鎖相環(huán) - PLL CONTACT SILICON LABS FOR AVAILABILITY RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*