DOCUMENT CHANGE L
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� SI5324B-C-GMR
寤犲晢锛� Silicon Laboratories Inc
鏂囦欢闋佹暩(sh霉)锛� 69/72闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC CLOCK MULT 2KHZ-808MHZ 36VQFN
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 250
绯诲垪锛� DSPLL®
椤炲瀷锛� 鏅�(sh铆)閻�/闋荤巼鍊嶅鍣�锛屾姈鍕�(d貌ng)琛版笡鍣紝澶氳矾寰�(f霉)鐢ㄥ櫒
PLL锛� 鏄�
涓昏鐩殑锛� 浠ュお缍�(w菐ng)锛圵AN锛�锛孲ONET/SDH/STM锛岃闋�
杓稿叆锛� 鏅�(sh铆)閻�
杓稿嚭锛� CML锛孋MOS锛孡VDS锛孡VPECL
闆昏矾鏁�(sh霉)锛� 1
姣旂巼 - 杓稿叆:杓稿嚭锛� 2:2
宸垎 - 杓稿叆:杓稿嚭锛� 鏄�/鏄�
闋荤巼 - 鏈€澶э細 808MHz
闆绘簮闆诲锛� 1.71 V ~ 3.63 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 36-VFQFN 瑁搁湶鐒婄洡
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 36-QFN锛�6x6锛�
鍖呰锛� 甯跺嵎 (TR)
Si5324
Rev. 1.1
71
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
Updated Rise/Fall Time values.
Updated minimum loop BW value.
Revision 0.2 to Revision 0.25
Updated features and applications.
Changed maximum loop bandwidth to 525 Hz
(global).
Updated PLL performance specifications in Table 1.
Added Typical Video Phase Noise Plot and data.
Removed references to Si5325.
Added note to register CKOUT_ALWAYS_ON on
how to control output to output skew.
Added Product Selection Guide to Section 鈥�7.
Corrected typographical errors in Table 1.
Updated typical phase noise performance page.
Updated functional description.
Added additional phase noise plots to Section 鈥�3.3.
Updated Register Map.
Revised Device Top Mark.
Revision 0.25 to Revision 0.3
Changed Any-Rate to Any-Frequency
Changed Table 2, 鈥淎bsolute Maximum Ratings,鈥� on
page 6.
Added 鈥渘o bypass with CMOS outputs鈥�
Revision 0.3 to Revision 1.0
Expanded spec Tables 1 and 2 to include all
specifications in the Reference Manual.
Reordered sections to conform to data sheet quality
convention.
Added tSETTLE specification.
Corrected minor register map typos.
Minor changes to Table 2.
Added maximum lock and settle times to Table 3.
Added titles to Tables 8, 9, and 10.
Updated/added selection guide Tables 13 and 14.
Removed SLEEP from register map.
Added warning about MEMS reference oscillators to
Revision 1.0 to Revision 1.1
Added reference to AN803 on pages 11,19,20,34,62.
Added additional LOL and Settling Time Specs on
page 11.
Added new part numbers on page 64.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
Si5324C-C-GM 鍔熻兘鎻忚堪:鏅�(sh铆)閻樺悎鎴愬櫒/鎶栧嫊(d貌ng)娓呴櫎鍣� Prec.Clk Mult/Jitter Atten. 2kHz-346MHz RoHS:鍚� 鍒堕€犲晢:Skyworks Solutions, Inc. 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭闆诲钩: 鏈€澶ц几鍑洪牷鐜�: 杓稿叆闆诲钩: 鏈€澶ц几鍏ラ牷鐜�:6.1 GHz 闆绘簮闆诲-鏈€澶�:3.3 V 闆绘簮闆诲-鏈€灏�:2.7 V 灏佽 / 绠遍珨:TSSOP-28 灏佽:Reel
SI5324C-C-GMR 鍔熻兘鎻忚堪:鏅�(sh铆)閻樺悎鎴愬櫒/鎶栧嫊(d貌ng)娓呴櫎鍣� Lo Loop BW Clk Multi Jitter Attn 2In/Out RoHS:鍚� 鍒堕€犲晢:Skyworks Solutions, Inc. 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭闆诲钩: 鏈€澶ц几鍑洪牷鐜�: 杓稿叆闆诲钩: 鏈€澶ц几鍏ラ牷鐜�:6.1 GHz 闆绘簮闆诲-鏈€澶�:3.3 V 闆绘簮闆诲-鏈€灏�:2.7 V 灏佽 / 绠遍珨:TSSOP-28 灏佽:Reel
Si5324D-C-GM 鍔熻兘鎻忚堪:鏅�(sh铆)閻樺悎鎴愬櫒/鎶栧嫊(d貌ng)娓呴櫎鍣� Prec.Clk Mult/Jitter Atten. 2kHz-150MHz RoHS:鍚� 鍒堕€犲晢:Skyworks Solutions, Inc. 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭闆诲钩: 鏈€澶ц几鍑洪牷鐜�: 杓稿叆闆诲钩: 鏈€澶ц几鍏ラ牷鐜�:6.1 GHz 闆绘簮闆诲-鏈€澶�:3.3 V 闆绘簮闆诲-鏈€灏�:2.7 V 灏佽 / 绠遍珨:TSSOP-28 灏佽:Reel
SI5324D-C-GMR 鍔熻兘鎻忚堪:鏅�(sh铆)閻樺悎鎴愬櫒/鎶栧嫊(d貌ng)娓呴櫎鍣� Lo Loop BW Clk Multi Jitter Attn 2In/Out RoHS:鍚� 鍒堕€犲晢:Skyworks Solutions, Inc. 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭闆诲钩: 鏈€澶ц几鍑洪牷鐜�: 杓稿叆闆诲钩: 鏈€澶ц几鍏ラ牷鐜�:6.1 GHz 闆绘簮闆诲-鏈€澶�:3.3 V 闆绘簮闆诲-鏈€灏�:2.7 V 灏佽 / 绠遍珨:TSSOP-28 灏佽:Reel
SI5324E-C-GM 鍒堕€犲晢:Silicon Laboratories Inc 鍔熻兘鎻忚堪:ANYRATE PRECISION CLOCK - Trays