參數(shù)資料
型號: SI5325B-C-GM
廠商: Silicon Laboratories Inc
文件頁數(shù): 50/62頁
文件大小: 0K
描述: IC UP-PROG CLK MULTIPLIER 36-QFN
標(biāo)準(zhǔn)包裝: 490
系列: DSPLL®
類型: 時(shí)鐘乘法器
PLL:
輸入: 時(shí)鐘
輸出: CML,CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 808MHz
除法器/乘法器: 是/是
電源電壓: 1.71 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 36-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 36-QFN(6x6)
包裝: 托盤
Si5325
54
Rev. 0.5
21
CS_CA
I/O
LVCMOS
Input Clock Select/Active Clock Indicator.
Input: In manual clock selection mode, this pin functions as
the manual input clock selector if the CKSEL_PIN is
set to 1.
0 = Select CKIN1.
1 = Select CKIN2.
If CKSEL_PIN =0, the CKSEL_REG register bit
controls this function. If configured as input, must be
set high or low.
Output: In automatic clock selection mode, this pin indicates
which of the two input clocks is currently the active
clock. If alarms exist on both clocks, CA will indicate
the last active clock that was used before entering
the VCO freeze state. The CK_ACTV_PIN register
bit must be set to 1 to reflect the active clock status
to the CA output pin.
0 = CKIN1 active input clock.
1 = CKIN2 active input clock.
If CK_ACTV_PIN = 0, this pin will tristate. The CA
status will always be reflected in the
CK_ACTV_REG read only register bit.
22
SCL
I
LVCMOS
Serial Clock/Serial Clock.
This pin functions as the serial clock input for both SPI and
I2C modes.
This pin has a weak pulldown.
23
SDA_SDO
I/O
LVCMOS
Serial Data.
In I2C control mode (CMODE = 0), this pin functions as the
bidirectional serial data port.
In SPI control mode (CMODE = 1), this pin functions as the
serial data output.
25
24
A1
A0
ILVCMOS
Serial Port Address.
In I2C control mode (CMODE = 0), these pins function as
hardware controlled address bits. The I2C address is 1101
[A2] [A1] [A0].
In SPI control mode (CMODE = 1), these pins are ignored.
This pin has a weak pulldown.
26
A2_SS
ILVCMOS
Serial Port Address/Slave Select.
In I2C control mode (CMODE = 0), this pin functions as a
hardware controlled address bit [A2].
In SPI control mode (CMODE = 1), this pin functions as the
slave select input.
This pin has a weak pulldown.
Table 11. Si5325 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
Note: Internal register names are indicated by underlined italics, e.g., INT_PIN. See Si5325 Register Map.
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SI5325B-C-GMR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 mP-Program Precision Clk Multiplier 2/2 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5325C-B-GM 功能描述:鎖相環(huán) - PLL uP-PROGRAMMABE CLK MULT 10 MHZ-346 MHZ RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
SI5325C-B-GMR 制造商:Silicon Laboratories Inc 功能描述:
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