參數(shù)資料
型號： SI5374B-A-GL
廠商： Silicon Laboratories Inc
文件頁數(shù)： 58/69頁
文件大?。?/td> 0K
描述： IC CLK GEN/JITTER ATTEN 80LBGA
標(biāo)準(zhǔn)包裝： 240
系列： DSPLL®
類型： 時(shí)鐘發(fā)生器，漂移衰減器
PLL： 是
輸入： 時(shí)鐘
輸出： CML，CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 8:8
差分 - 輸入:輸出： 是/是
頻率 - 最大： 808MHz
除法器/乘法器： 是/是
電源電壓： 1.71 V ~ 2.75 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 80-LBGA
供應(yīng)商設(shè)備封裝： 80-BGA（10x10）
包裝： 托盤
其它名稱： 336-2046
Si5374
Rev. 1.1
61
E2
C5
E8
H5
LOL_A
LOL_B
LOL_C
LOL_D
OLVCMOS DSPLLq Loss of Lock Indicator.
These pins function as the active high PLL loss of lock indicator if
the LOL_PIN register bit is set to 1.
0 = PLL locked.
1 = PLL unlocked.
If LOL_PINn = 0, this pin will tri-state. Active polarity is controlled
by the LOL_POLn bit. The PLL lock status will always be
reflected in the LOL_INTn read only register bit (see application
note, "AN803: Lock and Settling Time Considerations for the
Si5324/27/69/74 Any-Frequency Jitter Attenuating Clock ICs).
D1
A6
F9
J4
CS_CA_A
CS_CA_B
CS_CA_C
CS_CA_D
I/O
LVCMOS DSPLLq Input Clock Select/Active Clock Indicator.
Input
: In manual clock selection mode, this pin functions as the
manual input clock selector if the CKSEL_PIN is set to 1.
0 = Select CKIN1
1 = Select CKIN2
If CKSEL_PIN = 0, the CKSEL_REG register bit controls this
function and this input tristates. If configured for input, must be
tied high or low.
Output
: In automatic clock selection mode, this pin indicates
which of the two input clocks is currently the active clock. If
alarms exist on both clocks, CK_ACTV will indicate the last active
clock that was used before entering the digital hold state. The
CK_ACTV_PIN
register bit must be set to 1 to reflect the active
clock status to the CK_ACTV output pin.
0 = CKIN1 active input clock
1 = CKIN2 active input clock
If CK_ACTV_PIN = 0, this pin will tristate. The CK_ACTV status
will always be reflected in the CK_ACTV_REG read only register
bit.
G5
SCL
I
LVCMOS I2C Serial Clock.
This pin functions as the serial clock input.
This pin has a weak pull-down.
G6
SDA
I/O
LVCMOS I2C Serial Data.
I2C pin functions as the bi-directional serial data port.
Table 11. Si5374 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal
Level
Description
Note:
Internal register names are indicated by italics, e.g., IRQ_PIN. See Si5374 Register Map.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
Si5374-EVB 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 QUAD DSPLL 8IN/8OUT CLOCK EVAL KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
Si5375B-A-BL 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 Loop BW 60Hz-8.4 kHz 4In/Out 2kHz-808MHz RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
Si5375B-A-GL 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 QUAD DSPLL JITT ATT CLK ST LP BW 4IN/OUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
Si5375-EVB 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 QUAD DSPLL 4IN/4OUT CLOCK EVAL KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
SI5376B-A-BL 制造商:Silicon Laboratories Inc 功能描述:QUAD DSPLL JITTER ATTENUATING CLOCK, - Trays 制造商:Silicon Laboratories Inc 功能描述:IC CLK GEN/JITTER ATTEN 80PBGA
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