參數(shù)資料
型號(hào): SN54ALS190
廠商: Texas Instruments, Inc.
元件分類(lèi): 通用總線功能
英文描述: SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS
中文描述: 同步4位向上/向下十年和二進(jìn)制計(jì)數(shù)器
文件頁(yè)數(shù): 2/8頁(yè)
文件大小: 140K
代理商: SN54ALS190
SN54ALS190, SN54ALS190
SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS
SDAS210 – D2661, DECEMBER 1982 – REVISED MAY 1986
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2
’ALS190 logic symbol
A
B
13
RCO
3(CT=9)Z6
C5
[8]
[4]
[2]
[1]
1,5D
1,2–/1,3+
G4
M3 (UP)
M2 (DOWN)
G1
7
QD
6
QC
2
QB
3
QA
MAX/MIN
12
2(CT=0)Z6
CTRDIV10
9
D
10
C
1
15
11
LOAD
14
CLK
4
5
CTEN
D/U
6,1,4
’ALS190 logic diagram (positive logic)
CTEN
D/U
CLK
LOAD
A
B
C
10
9
1
15
11
14
5
4
12MAX/MIN
13RCO
1D
R
S
QD
7
C1
1D
R
S
QC
6
C1
C1
2QB
R
S
1D
1D
R
S
QA
3
C1
D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
相關(guān)PDF資料
PDF描述
SN54LS109J LOG CMOS GATE AND QUAD; Package: SOEIAJ-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2000
SN54LS112A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN74LS112D DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN74LS112N DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN54LS113A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
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