參數(shù)資料
型號(hào)： SN74ABT18504PMRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： ABT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64
封裝： GREEN, PLASTIC, LQFP-64
文件頁數(shù)： 12/32頁
文件大?。?/td> 505K
代理商： SN74ABT18504PMRG4
SN54ABT18504, SN74ABT18504
SCAN TEST DEVICES WITH
20-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS108B – AUGUST 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2
18 19
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
21 22 23 24
63 62 61 60 59
64
58
56 55 54
57
25 26 27 28 29
53 52
17
51 50 49
30 31 32
A1
GND
LEBA
TDO
A3
A2
OEBA
V
CLKENBA
B1
B2
B3
TMS
CLKBA
GND
B4
A19
GND
CLKENAB
CLKAB
A17
A18
A20
TDI
LEAB
OEAB
B20
B19
V
TCK
GND
B18
A4
A5
A6
GND
A7
A8
A9
A10
VCC
A11
A12
A13
GND
A14
A15
A16
B5
B6
B7
GND
B8
B9
B10
VCC
B11
B12
B13
B14
GND
B15
B16
B17
CC
SN74ABT18504 ...PM PACKAGE
(TOP VIEW)
description
The SN54ABT18504 and SN74ABT18504 scan test devices with 20-bit universal bus transceivers are
members of the Texas Instruments SCOPE
testability IC family. This family of devices supports IEEE
Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to
the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
In the normal mode, these devices are 20-bit universal bus transceivers that combine D-type latches and D-type
flip-flops to allow data flow in transparent, latched, or clocked modes. The test circuitry can be activated by the
TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary
test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPE
universal bus transceivers.
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),
clock-enable (CLKENAB and CLKENBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the
device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched while
CLKENAB is high and/or CLKAB is held at a static low or high logic level. Otherwise, if LEAB is low and
CLKENAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB is low, the B outputs
are active. When OEAB is high, the B outputs are in the high-impedance state. B-to-A data flow is similar to
A-to-B data flow but uses the OEBA, LEBA, CLKENBA, and CLKBA inputs.
In the test mode, the normal operation of the SCOPE
universal bus transceivers is inhibited, and the test
circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry
performs boundary scan test operations according to the protocol described in IEEE Standard 1149.1-1990.
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