參數(shù)資料
型號(hào): SN74ABT18504PMRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: ABT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64
封裝: GREEN, PLASTIC, LQFP-64
文件頁數(shù): 28/32頁
文件大?。?/td> 505K
代理商: SN74ABT18504PMRG4
SN54ABT18504, SN74ABT18504
SCAN TEST DEVICES WITH
20-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS108B – AUGUST 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
5
Terminal Functions
PIN NAME
DESCRIPTION
A1 – A20
Normal-function A-bus I/O ports. See function table for normal-mode logic.
B1 – B20
Normal-function B-bus I/O ports. See function table for normal-mode logic.
CLKAB, CLKBA
Normal-function clock inputs. See function table for normal-mode logic.
CLKENAB,
CLKENBA
Normal-function clock enables. See function table for normal-mode logic.
GND
Ground
LEAB, LEBA
Normal-function latch enables. See function table for normal-mode logic.
OEAB, OEBA
Normal-function output enables. See function table for normal-mode logic.
TCK
Test clock. One of four pins required by IEEE Standard 1149.1-1990. Test operations of the device are synchronous to the
test clock. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK.
TDI
Test data input. One of four pins required by IEEE Standard 1149.1-1990. The test data input is the serial input for shifting
data through the instruction register or selected data register. An internal pullup forces TDI to a high level if left unconnected.
TDO
Test data output. One of four pins required by IEEE Standard 1149.1-1990. The test data output is the serial output for shifting
data through the instruction register or selected data register.
TMS
Test mode select. One of four pins required by IEEE Standard 1149.1-1990. The test mode select input directs the device
through its test access port (TAP) controller states. An internal pullup forces TMS to a high level if left unconnected.
VCC
Supply voltage
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