參數(shù)資料
型號(hào)： SPC5200CVR400R2
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 37/72頁(yè)
文件大?。?/td> 0K
描述： IC MPU 32BIT 400MHZ 272-PBGA
標(biāo)準(zhǔn)包裝： 500
系列： MPC52xx
處理器類(lèi)型： 32-位 MPC52xx PowerPC
速度： 400MHz
電壓： 1.5V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 272-BBGA
供應(yīng)商設(shè)備封裝： 272-PBGA（27x27）
包裝： 帶卷 (TR)
MPC5200B Data Sheet, Rev. 4
42
Freescale Semiconductor
Figure 32. Timing Diagram — SPI Master Mode, Format 0 (CPHA = 0)
NOTE
Output timing is specified at a nominal 50 pF load.
Table 37. Timing Specifications — SPI Slave Mode, Format 0 (CPHA = 0)
Sym
Description
Min
Max
Units
SpecID
1
Cycle time
4
1024
IP-Bus Cycle(1)
1 Inter Peripheral Clock is defined in the MPC5200B User’s Manual (MPC5200BUM).
A11.12
2
Clock high or low time
2
512
IP-Bus Cycle(1)
A11.13
3
Slave select to clock delay
15.0
—
ns
A11.14
4
Output Data valid after Slave Select (SS)
—
50.0
ns
A11.15
5
Output Data valid after SCK
—
50.0
ns
A11.16
6
Input Data setup time
50.0
—
ns
A11.17
7
Input Data hold time
0.0
—
ns
A11.18
8
Slave disable lag time
15.0
—
ns
A11.19
9
Sequential Transfer delay
1
—
IP-Bus Cycle(1)
A11.20
SCK
(CLKPOL=0)
SCK
(CLKPOL=1)
MOSI
Output
SS
Output
MISO
Input
1
22
8
9
3
4
5
6
7
11
10
11
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