NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, perform" />
參數(shù)資料
型號(hào)： ST16C2552IJ44-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 28/34頁(yè)
文件大小： 0K
描述： IC UART FIFO 16B DUAL 44PLCC
標(biāo)準(zhǔn)包裝： 27
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 16 字節(jié)
規(guī)程： RS232，RS485
電源電壓： 3.3 V ~ 5 V
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 44-PLCC（16.59x16.59）
包裝： 管件
其它名稱： 1016-1258-5
34
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2010 EXAR Corporation
Datasheet September 2010.
Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
ST16C2552
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
REV. 4.2.2
Revision History
DATE
REVISION
DESCRIPTION
February 2002
4.0
Changed to standard style format. Text descriptions were clarified and sim-
plified (eg. DMA operation, FIFO mode vs. Non-FIFO mode operations etc).
Clarified timing diagrams. Renamed Rclk (Receive Clock) to Bclk (Baud
Clock) and timing symbols. Added TAH, TCS and OSC.
March 2002
4.1
Minor clarifications in text descriptions. Changed A0-A7 in Figures 14 and 15
to A0-A2.
September 2003
4.2
Changed to single column format. Corrected A2 and A0 pin numbers in Pin
Descriptions. Added Device Status to Ordering Information. Devices with top
markings of "A2 YYWW" and newer have 5V tolerant inputs. Devices with top mark-
ings of "CC YYWW" and older do not have 5V tolerant inputs.
October 2006
4.2.1
Corrected ordering information. Added third digit to Revision Number.
September 2010
4.2.2
Updated ’Voltage at any pin’ from ’GND - 0.3V to VCC + 0.3V’ to ’GND - 0.3V
to +5.5V’.
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