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4.3 ARTIMER 16
The ARTIMER16 is a timer module based on a 16
bit downcounter with Reload, Capture and Com-
pare features to manage timing requirements.
Two outputs provide PWM and Overflow (OVF)
output signals each with programmable polarity,
and two inputs CP1 and CP2 control start-up, cap-
ture and/or reload operations on the central coun-
ter.
The ARTIMER16 includes four 16-bit registers
CMP,RLCP,MASK and CP for the Reload, Cap-
ture and compare functions, four 8-bit status/con-
trol registers and the associated control logic.The
16-bit registers are accessed from the 8-bit inter-
nal bus. The full 16-bit word is written in two bytes,
the high byte first and then the low byte. The high
byte is stored in an intermediate register and is
written to the target 16-bit register at the same
time as the write to the low byte. This high byte will
remain constant if further writes are made to the
low bytes, until the high byte is changed. Full
Read/Write access is available to all registers ex-
cept where mentioned.
The ARTIMER16 may be placed into the reset
mode by resetting RUNRES to 0 in order to
achieve lower consumption. The contents of
RLCP, CP, MASK and CMP are not affected, nor
is the previous run mode of the timer changed. If
RUNRES is subsequently set to 1, the timer re-
starts in the same RUN mode as previously set if
no changes are made to the timer status registers.
Finally, interrupt capabilities are associated to the
Reload, Capture and Compare features.
Figure 23. . ARTIMER16 Block Diagram
SCR1
SCR2
SCR3
SCR4
BU
S
IN
T
ER
F
A
C
E
8-
B
it
M
CU
D
A
T
A
B
U
S
16
-B
it
DA
T
A
B
U
S
8
4
8
16
CMP
MASK
RLCP
CP
16
COUNTER
CONTROL LOGIC
Compare-to-0
Compare
PSC
f
INT
PWM
OVF
CP1
CP2
INT
16-Bit
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