參數(shù)資料
型號(hào)： ST62P45BQ6/XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP52
封裝： PLASTIC, QFP-52
文件頁(yè)數(shù)： 51/72頁(yè)
文件大?。?/td> 514K
代理商： ST62P45BQ6/XXX
55/72
ST62T45B/E45B
INSTRUCTION SET (Cont’d)
Conditional Branch. The branch instructions
achieve a branch in the program when the select-
ed condition is met.
Bit Manipulation Instructions. These instruc-
tions can handle any bit in data space memory.
One group either sets or clears. The other group
(see Conditional Branch) performs the bit test
branch operations.
Control Instructions. The control instructions
control the MCU operations during program exe-
cution.
Jump and Call. These two instructions are used
to perform long (12-bit) jumps or subroutines call
inside the whole program space.
Table 24. Conditional Branch Instructions
Notes
:
b.
3-bit address
rr.
Data space register
e.
5 bit signed displacement in the range -15 to +16<F128M>
. Affected. The tested bit is shifted into carry.
ee.
8 bit signed displacement in the range -126 to +129
* .
Not Affected
Table 25. Bit Manipulation Instructions
Notes:
b.
3-bit address;
* . Not<M> Affected
rr.
Data space register;
Table 26. Control Instructions
Notes:
1.
This instruction is deactivated<N>and a WAI T is automatically executed instead of a STOP if the watchdog function is selected.
. Affected
*.
Not Affected
Table 27. Jump & Call Instructions
Notes:
abc. 12-bit address;
* .
Not Affected
Instruction
Branch If
Bytes
Cycles
Flags
ZC
JRC e
C = 1
1
2
*
JRNC e
C = 0
1
2
*
JRZe
Z= 1
1
2
*
JRNZ e
Z = 0
1
2
*
JRR b, rr, ee
Bit = 0
3
5
*
JRS b, rr, ee
Bit = 1
3
5
*
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
SET b,rr
Bit Direct
2
4
*
RES b,rr
Bit Direct
2
4
*
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
NOP
Inherent
1
2
*
RET
Inherent
1
2
*
RETI
Inherent
1
2
STOP (1)
Inherent
1
2
*
WAIT
Inherent
1
2
*
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
CALL abc
Extended
2
4
*
JP abc
Extended
2
4
*
54
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