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參數(shù)資料
| 型號： | ST62P45BQ6/XXX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | PLASTIC, QFP-52 |
| 文件頁數(shù)： | 54/72頁 |
| 文件大?。?/td> | 514K |
| 代理商： | ST62P45BQ6/XXX |
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ST62T45B/E45B
6 ELECTRICAL CHARACTERISTICS
6.1 ABSOLUTE MAXIMUM RATINGS
This product contains devices to protect the inputs
against damage due to high static voltages, how-
ever it is advisable to take normal precaution to
avoid application of any voltage higher than the
specified maximum rated voltages.
For proper operation it is recommended that VI
and VO be higher than VSS and lower than VDD.
Reliability is enhanced if unused inputs are con-
nected to an appropriate logic voltage level (VDD
or VSS).
Power Considerations.The average chip-junc-
tion temperature, Tj, in Celsius can be obtained
from:
Tj=
TA + PD x RthJA
Where: TA =
Ambient Temperature.
RthJA = Package thermal resistance
(junction-to ambient).
PD =
Pint + Pport.
Pint =
IDD x VDD (chip internal power).
Pport = Port power dissipation (deter-
mined by the user).
Notes:
-
Stresses above those listed as ”absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended period s may
affect device reliability.
- (1) Within these limits, clamping diodes are guarantee to be not conductive. Voltages outside these limits are authorised as long as injection
current is kept within the specification.
Symbol
Parameter
Value
Unit
VDD
Supply Voltage
-0.3 to 7.0
V
VI
Input Voltage
VSS - 0.3 to VDD + 0.3
(1)
V
VO
Output Voltage
VSS - 0.3 to VDD + 0.3
(1)
V
IO
Current Drain per Pin Excluding VDD,VSS
±10
mA
IVDD
Total Current into VDD (source)
50
mA
IVSS
Total Current out of VSS (sink)
50
mA
Tj
Junction Temperature
150
°C
TSTG
Storage Temperature
-60 to 150
°C
57
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