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參數(shù)資料
| 型號： | ST6395 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| 中文描述： | 8位微控制器HCMOS電視頻率合成帶OSD |
| 文件頁數(shù)： | 45/68頁 |
| 文件大?。?/td> | 560K |
| 代理商： | ST6395 |
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6-BIT PWMD/A CONVERTERS
The D/A macrocell contains up to six PWM D/A
outputs (31.25kHzrepetition,DA0-DA5)with six bit
resolution.
Each D/AconverterofST639xis composed bythe
following main blocks:
- pre-divider
- 6-bitcounter
- data latches and compare circuits
The pre-divider uses the clock input frequency
(8MHz typical) and its output clocks the 6-bit free-
running counter. The data latched in thesix regis-
ters (E0h,E1h,E2h,E3h,E6h andE7h)controlthe
six D/Aoutputs (DA0,1,2, 3, 4 and 5).When all ze-
ros are loaded the relevant output is an highlogic
level; all 1’s correspond to a pulse with a 1/64 duty
cycle and almost 100% zero level.
The repetitionfrequencyis 31.25kHzand isrelated
to the8MHz clock frequency.Use of a differentos-
cillator frequency will result in a different repetition
frequency. All D/A outputs are open-drain with
standard current drive capability and able to with-
stand up to 12V.
DA0-DA5.
These are the 6 bitsof the PWM digital
to analogconverter. Undefined afterreset.
AFC A/D COMPARATOR
AFC A/DINPUT,IR/PC6RESULT,VSYNCRESULT
The AFC macrocell contains an A/D comparator
with fivelevelsatintervalsof 1V from1V to5V. The
levels canall belowered by0.5Vto effectivelydou-
ble theresolution.
A/D Comparator
The A/D used to perform the AFC function (when
high threshold is selected) has the following volt-
age levels: 1,2,3,4 and 5V. Bits 0-2 of AFC result
register (E4h address)will provide the resultin bi-
nary form (less than 1V is 000, greater than 5V is
101).
If the application requires a greater resolution,the
sensitivity can be doubled by clearing to zero bit 2
of the OUTPUTS control register, address E5h.In
this case all levelsare shifted lower by 0.5V.If the
two results are now added within a software rou-
tine then the A/D S-curve can be located within a
resolution of 0.5V.
The A/D input has high impedance able to with-
stand up to 13V signals (input level tolerances
±
200mV absoluteand
±
100mv relative to 5V).
DA0, DA1, DA2, DA3, DA4, DA5
DA0 toDA5 Data/control Registers
(E0h, E1h,E2h, E3h, E6h, E7h Write Only)
D7 D6 D5 D4 D3 D2 D1 D0
Data Bit0
Data Bit1
Data Bit2
Data Bit3
Data Bit4
Data Bit5
Unused
Unused
Figure50. DA0-DA5 Data/Control Registers
Figure51.6-bit PWM D/A Output Configuration
Figure 52. AFC Inputs Configuration Diagram
ST6391,92,93,95,97,99
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ST6395B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6397 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6397B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6399 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6399B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
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