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參數(shù)資料
| 型號： | ST6395 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| 中文描述： | 8位微控制器HCMOS電視頻率合成帶OSD |
| 文件頁數(shù)： | 51/68頁 |
| 文件大?。?/td> | 560K |
| 代理商： | ST6395 |
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D7.
Thisbit is not used
FR.
Fringe Background.This bitchanges theback-
ground from a box background to a fringe back-
ground. The background is enabled by word as
defined byeither BG0or BG1.
“0” -The backgroundis defined to bea box whichis
7 x 9dots.
“1” -The background is defined to be a fringe.
VSA5-VSA0.
Vertical Start Address. These bits
determine the start position of the first line in the
vertical direction. The 6 bits can specify 63 display
start positionsof interval 4H. Thefirststartposition
will be the fourth line of the display. The vertical
start addressis defined VSA0by the followingfor-
mula.
Vertical Start Address = 4H(2
5
(VSA5) + 2
4
(VSA4)
+ 2
3
(VSA3)+ 2
2
(VSA2) + 2
1
(VSA1) + 2
0
(VSA0))
The case of all Vertical Start Address bits being
zero is illegal.
D7.
This bitis not used.
SBD.
Space Blanking Disable. This bit controls
whether or not the background is displayedwhen
outputting spaces. If two background colours are
used on adjacent words, then the background
should not be displayed on spaces in order to
make a nice break between colours. If an even
background aroundan area of textis desired,asin
a menu, then the background should be displayed
when outputtingspaces.
“0” -The backgroundduringspaces iscontrolled by
the backgroundenable bits (BG0and BG1)lo-
cated in theBackground Control register.
“1” -The backgroundis notdisplayed when output-
ting spaces.
HSA5, HSA0 -
Horizontal Start Address bits.
These bits determine the start position of the first
character inthe horizontal direction. The 6 bitscan
specify 64display startpositionsofinterval2/f
osc
or
400ns. The first start position will be at 4.0
μ
s be-
cause of the time needed to access RAM and
ROM before the first character can be displayed.
The horizontal start address is defined by the fol-
lowing formula.
Horizontal Start Address = 2/fosc(10.0+ 2
5
(HSA5)
+ 2
4
(HSA4) + 2
3
(HSA3) + 2
2
(HSA2) + 2
1
(HSA1) +
2
0
(HSA0))
ON-SCREEN DISPLAY
(Continued)
Figure60. Vertical Start Address Register
VSAR
Vertical Start Address Register
(10h -Page 6, Write Only)
D7 D6 D5 D4 D3 D2 D1 D0
VSA5-VSA0= VerticalStart
Addressbits
FR =Fringe Backround
Controlbit
Unused
HSAR
Horizontal Start Address Register
(11h - Page 6, Write Only)
D7 D6 D5 D4 D3 D2 D1 D0
HSA5-HSA0 = Horizontal Start
Address bits
SBD = Space Blanking
Disabled bit
Unused
Figure 61. HorizontalStart Address Register
ST6391,92,93,95,97,99
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ST6395B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6397 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6397B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6399 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
| ST6399B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD |
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