參數(shù)資料
型號(hào): ST72F60K2DIE6
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, UUC
文件頁(yè)數(shù): 96/121頁(yè)
文件大小: 2515K
代理商: ST72F60K2DIE6
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ST7260
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USB INTERFACE (Cont’d)
DEVICE ADDRESS REGISTER (DADDR)
Read / Write
Reset Value: 0000 0000 (00h)
Bit 7 = Reserved. Forced by hardware to 0.
Bits 6:0 = ADD[6:0] Device address, 7 bits.
Software must write into this register the address
sent by the host during enumeration.
Note: This register is also reset when a USB reset
is received from the USB bus or forced through bit
FRES in the CTLR register.
ENDPOINT n REGISTER A (EPnRA)
Read / Write
Reset Value: 0000 xxxx (0xh)
These registers (EP0RA, EP1RA and EP2RA) are
used for controlling data transmission. They are
also reset by the USB bus reset.
Note: Endpoint 2 and the EP2RA register are not
available on some devices (see device feature list
and register map).
Bit 7 = ST_OUT Status out.
This bit is set by software to indicate that a status
out packet is expected: in this case, all nonzero
OUT data transfers on the endpoint are STALLed
instead of being ACKed. When ST_OUT is reset,
OUT transactions can have any number of bytes,
as needed.
Bit 6 = DTOG_TX Data Toggle, for transmission
transfers.
It contains the required value of the toggle bit
(0=DATA0, 1=DATA1) for the next transmitted
data packet. This bit is set by hardware at the re-
ception of a SETUP PID. DTOG_TX toggles only
when the transmitter has received the ACK signal
from
the
USB
host.
DTOG_TX
and
also
DTOG_RX (see EPnRB) are normally updated by
hardware, at the receipt of a relevant PID. They
can be also written by software.
Bits 5:4 = STAT_TX[1:0] Status bits, for transmis-
sion transfers.
These bits contain the information about the end-
point status, which are listed below:
These bits are written by software. Hardware sets
the STAT_TX bits to NAK when a correct transfer
has occurred (CTR=1) related to a IN or SETUP
transaction addressed to this endpoint; this allows
the software to prepare the next set of data to be
transmitted.
Bits 3:0 = TBC[3:0] Transmit byte count for End-
point n.
Before transmission, after filling the transmit buff-
er, software must write in the TBC field the trans-
mit packet size expressed in bytes (in the range 0-
8).
Warning: Any value outside the range 0-8 will-
induce undesired effects (such as continuous data
transmission).
70
0
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
70
ST_
OUT
DTOG
_TX
STAT
_TX1
STAT
_TX0
TBC
3
TBC
2
TBC
1
TBC
0
STAT_TX1 STAT_TX0 Meaning
00
DISABLED: transmission
transfers cannot be executed.
01
STALL: the endpoint is stalled
and all transmission requests
result in a STALL handshake.
10
NAK: the endpoint is naked
and all transmission requests
result in a NAK handshake.
11
VALID: this endpoint is ena-
bled for transmission.
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ST72F60K2U1TR 功能描述:8位微控制器 -MCU ST7262 Lo Spd USB 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F621J4B1 功能描述:8位微控制器 -MCU Flash 16K USB/SPI/SC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F621J4D0 功能描述:8位微控制器 -MCU Flash 16K USB/SPI/SC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ST72F621J4T1 功能描述:8位微控制器 -MCU ST7262 Lo Spd USB 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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