REV. 5.1.0 ECP/EPP PARALLEL PRINTER PORT WITH 16-BYTE FIFO Cnfg-B Bits 5-3: Select an IRQ channel per the following table:
參數(shù)資料
型號(hào): ST78C36CJ44TR-F
廠(chǎng)商: Exar Corporation
文件頁(yè)數(shù): 27/27頁(yè)
文件大?。?/td> 0K
描述: IC UART FIFO 16B 44PLCC
標(biāo)準(zhǔn)包裝: 500
特點(diǎn): *
FIFO's: 16 字節(jié)
規(guī)程: 打印機(jī)
電源電壓: 5V
帶并行端口:
安裝類(lèi)型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線(xiàn))
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 帶卷 (TR)
ST78C36/36A
9
REV. 5.1.0
ECP/EPP PARALLEL PRINTER PORT WITH 16-BYTE FIFO
Cnfg-B Bits 5-3:
Select an IRQ channel per the following table:
TABLE 2: IRQ SELECTION: CNFG-B BITS[5:3]
WRITE TO FIFO
READ FROM FIFO
000
001
7
001
7 (Default)
010
9
011
001
7
100
001
7
101
001
7
110
001
7
111
5
Cnfg-B Bit-6:
Returns the true value of the selected IRQ pad.
Cnfg-B Bit-7:
Indicates RLE compression is not supported.
3.12
EXTENDED CONTROL REGISTER ( ECR )
The Extended Control Register has a system RESET state of 10010101. The significance of the bits is defined
by the ECP specification as:
ECR Bit-0:
This read-only bit returns FIFO empty status (FIFO-E) and is forced high unless PPF, ECP, or TST mode is
selected.
0 = At least one byte of data contains in the FIFO.
1 = FIFO is empty.
ECR Bit-1:
This read-only bit returns FIFO full status (FIFO-F) and is forced low unless PPF, ECP, or TST mode is
selected.
0 = At least one empty location is available in the FIFO.
1 = FIFO is full.
IRQ
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