參數(shù)資料
型號: STCD23300F35F
廠商: STMICROELECTRONICS
元件分類: 時鐘及定時
英文描述: 2330 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA12
封裝: 1.20 X 1.60 MM, 0.40 MM PITCH, ROHS COMPLIANT, FLIP CHIP-12
文件頁數(shù): 14/39頁
文件大?。?/td> 1948K
代理商: STCD23300F35F
STCD22x0, STCD23x0, STCD24x0
Typical operating characteristics
Doc ID 15400 Rev 2
Figure 15. Active current vs. supply voltage (EN1 = EN2 = EN3 = EN4 = 1, fMCLK = 26 MHz,
Cload = 20 pF)
Figure 16. Active current vs. master clock input voltage level (EN1 = EN2 = EN3 = EN4 = 1,
fMCLK = 26 MHz, Cload = 20 pF)
Figure 17. Active current vs. master clock frequency (EN1 = EN2 = EN3 = EN4 = 1, Cload = 20 pF)
1 channel enabled
2 channels enabled
3 channels enabled
4 channels enabled
AM00612v1
Activ
e
current
I
AC
T
(mA)
Supply voltage VCC (V)
0
1
2
3
4
5
6
2. 3
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
1 channel enabled
2 channels enabled
3 channels enabled
4 channels enabled
AM00613v1
Activ
e
current
I
AC
T
(mA)
Master clock fMCLK voltage level (Vpp)
0
1
2
3
4
5
6
7
0. 5
0. 8
1. 1
1. 4
1.8
0
5
10
15
Master clock frequency fMCLK (MHz)
Active
c
u
rr
ent
I
ACT
(mA)
1 channel enabled
2 channels enabled
3 channels enabled
4 channels enabled
AM00614v1
510
40
45
50
55
35
30
25
20
15
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