參數(shù)資料
型號: STCD23300F35F
廠商: STMICROELECTRONICS
元件分類: 時鐘及定時
英文描述: 2330 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA12
封裝: 1.20 X 1.60 MM, 0.40 MM PITCH, ROHS COMPLIANT, FLIP CHIP-12
文件頁數(shù): 2/39頁
文件大?。?/td> 1948K
代理商: STCD23300F35F
Device overview
STCD22x0, STCD23x0, STCD24x0
Doc ID 15400 Rev 2
Table 2.
Pin functions (STCD22x0, 2-channel)
Pin
number
Pin
name
Description
A1
VCC
Supply voltage (decouple with a 1 F capacitor to GND)
B1
VTCXO LDO output for external clock source (decouple with a 1 F capacitor to GND)
C1
MCLK
Master clock input
D1
OPT2
Optional pin 2. Connect to VCC or GND on PC board to field configure EN2
active high/low. Refer to
Section 3.2: Enable polarity for detailed information.
A2
BYP
Bypass capacitor input pin (10 nF capacitor should be connected to GND in
order to improve thermal noise performance)
B2
GND
Supply ground
C2
MCREQ Master clock request signal (open drain, active low)
D2
OPT1
Optional pin 1. Connect to VCC or GND on PC board to field configure EN1
active high/low. Refer to
Section 3.2: Enable polarity for detailed information.
A3
CLK1
Clock output channel - output 1
B3
EN1
Clock output channel enable-1 (active high/low OPT1 field programmable)
C3
EN2
Clock output channel enable-2 (active high/low OPT2 field programmable)
D3
CLK2
Clock output channel - output 2
Table 3.
Pin functions (STCD23x0, 3-channel)
Pin
number
Pin
name
Description
A1
VCC
Supply voltage (decouple with a 1 F capacitor to GND)
B1
VTCXO LDO output for external clock source (decouple with a 1 F capacitor to GND)
C1
MCLK
Master clock input
D1
EN3
Clock output channel enable-3 (active high/low factory laser programmable)
A2
BYP
Bypass capacitor input pin (10 nF capacitor should be connected to GND in
order to improve thermal noise performance)
B2
GND
Supply ground
C2
MCREQ Master clock request signal (open drain, active low)
D2
CLK3
Clock output channel - output 3
A3
CLK1
Clock output channel - output 1
B3
EN1
Clock output channel enable-1 (active high/low factory laser programmable)
C3
EN2
Clock output channel enable-2 (active high/low factory laser programmable)
D3
CLK2
Clock output channel - output 2
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