參數(shù)資料
型號: STCD23300F35F
廠商: STMICROELECTRONICS
元件分類: 時鐘及定時
英文描述: 2330 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA12
封裝: 1.20 X 1.60 MM, 0.40 MM PITCH, ROHS COMPLIANT, FLIP CHIP-12
文件頁數(shù): 38/39頁
文件大小: 1948K
代理商: STCD23300F35F
Device overview
STCD22x0, STCD23x0, STCD24x0
Doc ID 15400 Rev 2
Figure 4.
Hardware hookup (master clock enable active high)
Figure 5.
Connections diagram Flip Chip 12-bump (STCD22x0, 2-channel)
Note:
OPT1 is used to configure EN1 polarity. Connect OPT1 to VCC to configure EN1 active high
or connect OPT1 to GND to configure EN1 active low. In the same way OPT2 is used to
configure EN2.
C
Clock #4 output
Clock #3 output
Clock #2 output
Clock #1 output
Enable
control
EN4
EN3
EN2
EN1
CLK4
CLK3
CLK2
CLK1
OPT1
OPT2
MCLK
MC
REQ
VTCXO
BYP
V
CC
V
CC
XO
EN
STCD24x0
V
DD
ai14028b
Top view
C
B
A
3
2
1
Bottom view
CLK1
EN1
EN2
CLK2
BYP
GND
VCC
MCREQ
VTCXO
MCLK
OPT2
OPT1
GND
BYP
MCREQ
OPT1
CLK2
VCC
VTCXO
MCLK
OPT2
EN2
EN1
CLK1
3
2
1
DB
C
DA
ai14017
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