參數(shù)資料
型號(hào): STK17CA8-W45I
元件分類(lèi): 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: REAL TIME CLOCK, PDIP40
封裝: 0.600 INCH, DIP-40
文件頁(yè)數(shù): 10/22頁(yè)
文件大?。?/td> 579K
代理商: STK17CA8-W45I
STK17CA8
June 2003
18
Document Control # ML0023 rev 0.2
1FFFCh
Timekeeping - Day
D7
D6
D5
D4
D3
D2
D1
D0
XXX
XX
Day of Week
Lower nibble contains a value that correlates to day of the week. Day of the week is a ring counter that counts from 1 to 7 then returns to 1.
The user must assign meanting to the day value, as the day is not integrated with the date.
1FFFBh
Timekeeping - Hours
D7
D6
D5
D4
D3
D2
D1
D0
12/24
X
10s Hours
Hours
Contains the BCD value of hours in 24 hour format. Lower nibble contains the lower digit and operates from 0 to 9; upper nibble (two bits)
contains the upper digit and operates from 0 to 2. The range for the register is 0-23.
1FFFAh
Timekeeping - Minutes
D7
D6
D5
D4
D3
D2
D1
D0
X
10s Minutes
Minutes
Contains the BCD value of minutes. Lower nibble contains the lower digit and operates from 0 to 9; upper nibble contains the upper min-
utes digit and operates from 0 to 5. The range for the register is 0-59.
1FFF9h
Timekeeping - Seconds
D7
D6
D5
D4
D3
D2
D1
D0
X
10s Seconds
Seconds
Contains the BCD value of seconds. Lower nibble contains the lower digit and operates from 0 to 9; upper nibble contains the upper digit
and operates from 0 to 5. The range for the register is 0-59.
1FFF8h
Contol/Calibration
D7
D6
D5
D4
D3
D2
D1
D0
OSCEN
X
Calibration
Sign
Calibration
OSCEN
Oscillator Enable. When set to 1, the oscillator is halted. When set to 0, the oscillator runs. Disabling the oscillator saves battery/capacitor
power during storage. On a no-battery power-up, this bit is set to 1. The RTC will not run until the oscillator is enabled. Set this bit to 0 to
activate the RTC.
Calibration Sign
Determines if the calibration adjustment is applied as an addition to or as a subtraction from the time-base.
Calibration
These five bits control the calibration of the clock.
1FFF7h
Watchdog Timer
D7
D6
D5
D4
D3
D2
D1
D0
WDS
WDW
WDT
WDS
Watchdog Strobe. Setting this bit to 1 reloads and restarts the watchdog timer. Setting the bit to 0 has no affect. The bit is cleared automat-
ically once the watchdog timer is reset. The WDS bit is write only. Reading it always will return a 0.
WDW
Watchdog Write Enable. Setting this bit to 1 masks the watchdog timeout value (WDT5-WDT0) so it cannot be written. This allows the user
to strobe the watchdg without disturbing the timeout value. Setting this bit to 0 allows bits 5-0 to be witten on the next write to the Watchdog
register. The new value will be loaded on the nex internal watchdog clock after the write cycle is complete. This function is explained in
more detail in the watchdog timer section.
相關(guān)PDF資料
PDF描述
STK17T88-RF45TR PROGRAMMABLE TIMER, PDSO48
STK17T88-RF45 PROGRAMMABLE TIMER, PDSO48
STK17T88-RF25ITR PROGRAMMABLE TIMER, PDSO48
STK17TA8-R25I REAL TIME CLOCK, PDSO48
STK17TA8-R35 REAL TIME CLOCK, PDSO48
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