參數(shù)資料
型號(hào): SURELINK
元件分類: 參考電壓二極管
英文描述: Low Current Operation at 250 ,Low Reverse Leakage,Low Noise Zener Diode
中文描述: 250 的低電流運(yùn)算,低反向泄露,低噪聲穩(wěn)壓二極管
文件頁數(shù): 1/8頁
文件大?。?/td> 140K
代理商: SURELINK
B E N E F I T S
SureLINK domain validation
technology ensures robust
Ultra160 SCSI performance
through a variety of capabilities:
Verifies Ultra160 link integrity
Ensures system operation at
Ultra160 speeds
Reduces system downtime
Identifies marginal cabling
environments
Enables seamless integration
with SDMS software
Improves boot reliability
F E AT U R E S
Implementation of the SPI-3
Domain Validation Annex
guidelines
Basic Integrity Check
(Level 1)
Enhanced Integrity Check
(Level 2)
Extension of domain validation
to Margined Integrity Check
(Level 3)
Detects marginal cable and
backplane configurations that
may limit performance
S U R E L I N K T E C H N O L O G Y O F F E R S S E R V E R S , S T O R A G E
S U B S Y S T E M S A N D W O R K S TAT I O N S T H E I N D U S T R Y ’ S
N E W E S T A N D M O S T A D VA N C E D M E T H O D O F
E N S U R I N G U LT R A 1 6 0 S C S I I N T E G R I T Y
O V E R V I E W
LSI Logic
s SureLINK
domain validation technology offers the most
comprehensive and reliable method available today for enhancing Ultra160
SCSI performance. A significant advancement in system manageability,
SureLINK technology ensures robust and low-risk Ultra160 implementations
by optimizing the interoperability of SCSI devices. SureLINK domain valida-
tion is integrated in the Storage Device Management System (SDMS
) soft-
ware solution. SDMS software provides the software control for the manage-
ability enhancements in LSI Logic
s highly integrated LSI53C1010 PCI-Dual
Channel Ultra160 SCSI controller, as well as the LSI53C180, the industry
s
first Ultra160 SCSI bus expander. The groundbreaking SureLINK domain
validation technology, backed by LSI Logic
s long history of providing innovative
SCSI I/O solutions, can enable OEMs, designers and system integrators to
deliver a highly competitive Ultra160 SCSI offering for servers, storage sub-
systems and workstations.
SureLINK domain validation, performed at boot time as well as through-
out system operation, verifies that the system is capable of transferring data
at Ultra160 speeds, allowing it to renegotiate to lower speed and bus width
if necessary. SureLINK technology. Extends the domain validation guidelines
documented in the SPI-3 Annex. SureLINK technology performs basic,
enhanced and margined domain validation. SureLINK domain validation
significantly improves system manageability by assuring that the system has
margin at its given operating speed. This cable plant margining capability,
exclusive to LSI Logic
s Ultra160 solution, includes end-to-end margining
from the LSI53C1010 controller through the LSI53C180 bus expander to the
target device. Also, key to the LSI53C180 bus expander is its ability to cou-
ple bus segments together without any impact to SCSI protocol or software,
for entirely transparent communication.
The domain validation capability of SDMS software is available as an
independent application, as well as integrated in the DMI-based (Desktop
Management Interface) system management solution for enterprise class
implementations, providing the network administrator remote management
capability. SureLINK technology
s SDMS software also enables and manages
Asynchronous Information Protection (AIP), which safeguards all non-data
SureLINK
Ultra160 Domain Validation
相關(guān)PDF資料
PDF描述
SURGE Low Current Operation at 250 ,Low Reverse Leakage,Low Noise Zener Diode
SURMOU-1
SUU06N10-225L TRANSISTOR | MOSFET | N-CHANNEL | 100V V(BR)DSS | 6.5A I(D) | TO-251
SUU50N03-07 TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 25A I(D) | TO-251
SV010001 BODENBELAG FESTES VINYL 5.0M
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