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參數(shù)資料
| 型號(hào)： | SURELINK |
| 元件分類： | 參考電壓二極管 |
| 英文描述： | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| 中文描述： | 250 的低電流運(yùn)算，低反向泄露，低噪聲穩(wěn)壓二極管 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 140K |
| 代理商： | SURELINK |
O S D R I V E R S W I T H
S U R E L I N K T E C H N O L O G Y
SureLINK technology is supported
by an SDMS driver suite, which
includes:
Microsoft
and Windows 2000
Windows
NT
Novell
NetWare
4.11 and 5.0
Sun
Solaris
7.0
SCO UnixWare
7.x
Linux
initiator and target can successfully communicate at the negotiated speed
and these settings are kept. Basic domain validation is used to find problems
with cabling (for example, narrow cable on wide device or bad cables),
expanders that are not capable of transferring at the negotiated period or
width, damaged transceivers and improper termination.
L E V E L 2 : E N H A N C E D D O M A I N VA L I D AT I O N
Enhanced domain validation expands on basic domain validation by
providing the ability to send and receive a particular pattern. Enhanced
domain validation is performed by issuing several WRITE/READ BUFFER
commands and comparing the data sent and received. First, a WRITE
BUFFER is issued with a desired data pattern. Next, a READ BUFFER is
issued to the same buffer. The data of the READ BUFFER is compared to the
data sent during the WRITE BUFFER. If the data does not match, the initiator
renegotiates for a lower speed. If the data does match, the process can be
repeated with another data pattern. Several data patterns can be used to
check for different types of failures. The use of specific data patterns in
enhanced domain validation makes it possible to find problems such as
crosstalk, system noise, weak or strong transceivers, improper termination,
incorrect device spacing and cables with the wrong impedance.
L E V E L 3 : M A R G I N E D D O M A I N VA L I D AT I O N
Margined domain validation provides information on whether a given
system has margin. Margined domain validation uses the same
WRITE/READ BUFFER with data patterns as enhanced domain validation
while altering the electrical characteristics of the SCSI signals in the
LSI53C1010 Ultra160 SCSI controller. The electrical characteristics of the
signal are changed to verify the degree of margin in a system, which
ensures proper communication. One of the electrical characteristics that can
be altered is low voltage differential (LVD) drive strength. The drive current
for the SCSI signals can be set to nominal (Figure A), 120% of nominal
(Figure B), or 80% of nominal (Figure C). Setting the drive strength to 80%
or 120% of nominal is done to verify that the bus is not too heavily loaded
and that it does not have an impedance mismatch that may cause failures
when large amounts of data are sent. The LSI53C1010 controller can also
modify data to match the REQ/ACK time (Figure D and Figure E) of the
SCSI data signals. This is another way to verify that the domain has some
degree of margin to account for skew that may be introduced due to imped-
ance and wire length differences between data signals and REQ/ACK that
may not be found with the drive strength modification.
3
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| SURGE | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| SURMOU-1 | |
| SUU06N10-225L | TRANSISTOR | MOSFET | N-CHANNEL | 100V V(BR)DSS | 6.5A I(D) | TO-251 |
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| SV010001 | BODENBELAG FESTES VINYL 5.0M |
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