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參數(shù)資料
| 型號： | SY58627LMGTR |
| 廠商： | MICREL INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, MLF-32 |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 1423K |
| 代理商： | SY58627LMGTR |
Micrel, Inc.
Detailed Description
The SY58627L is a high speed, low jitter receive buffer
with integrated loopback capability. This buffer also
provides input signal detect and output disable. Four
selectable levels of equalization are included with the
receiver. Equalization allows for faster data rates and
longer distances by reducing the effects of intersymbol
interference (ISI) caused by long cable and trace
lengths. Input equalization supports data rates up to
6.4Gbps.
SY58627L
Janaury 2006
10
M9999-012606-A
hbwhelp@micrel.com
or (408) 955-1690
DC-Offset Capability
The SY58627L transmitter includes the VTTIN and
VTTOUT pin for maximum interface flexibility and DC-
offset capability for the input and output, respectively.
This feature allows for interfacing with different logic
families without the use of AC-coupling. The output
buffer has internal 50
source terminated CML
outputs for minimizing round-trip reflections.
Transmitter Disable and Shutdown
The SY58627L disable function is initiated by pulling
/RXEN to logic HIGH. In disable mode, RXQ goes to a
LOW state and /RXQ goes to a HIGH state. The
threshold for /RXEN is set with the VTH pin. When the
VTH pin is floating, the VTH levels are TTL/CMOS-
compatible with a threshold voltage at V
CC
/2 (V
EE
=
0V). For PECL compatible levels, apply a V
CC
-1.3V
voltage at the VTH pin. Please refer to, “Typical
Operating Characteristics” for more details.
Loopback
The SY58627L features a loopback test mode,
activated by setting LBSEL to logic HIGH. Using the
SY58627L with the SY58626L enables local loopback
and link side loopback, shown in Figures 2b and 2c.
This mode enables an external loopback path,
bypassing circuitry on both local and link side. Please
refer to Table 1 and Figure 3 for Loopback Control
information.
Figure 2a. Normal Operation
Figure 2b. Local Loopback Mode
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