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參數(shù)資料
| 型號(hào)： | SY58627LMGTR |
| 廠商： | MICREL INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, MLF-32 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 1423K |
| 代理商： | SY58627LMGTR |
Micrel, Inc.
Pin Description
SY58627L
Janaury 2006
4
M9999-012606-A
hbwhelp@micrel.com
or (408) 955-1690
Pin Number
Pin Name
Pin Function
3, 4
RXIN, /RXIN
Differential receiver input pair: This input pair is the differential signal input to the
device. It accepts AC- or DC-coupled signals as small as 100mV (200mV
PP
). The
loss-of-signal (LOS Level) includes a small amount of hysteresis to prevent the loss-
of-signal output from oscillating when no signal is present. RXIN and /RXIN
internally terminate to the VTTIN
pin through 50
. Please refer to the “Input
Interface Applications” section for more details. RXIN, /RXIN differential inputs
recommended be
≥
90mV
PK
to ensure valid outputs. Consider disabling the outputs
when the differential input is not present, or < 90mV
PK
(e.g.: Hot Swap Applications).
Input termination center-tap: RXIN and /RXIN terminate to VTTIN. The VTTIN pin
provides a center-tap to the internal termination network for maximum interface
flexibility, and DC-offset capability. Please refer to the “Input Interface Applications”
section for more details.
6
VTTIN
7
VREF-AC
Reference voltage: This output biases to V
CC
-0.84V. It is used for AC-coupling the
input pair (RXIN, /RXIN). Connect VREF-AC directly to the VTTIN pin. Bypass with
0.01μF low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA. Due to
the limited drive capability, the VREF-AC pin is only intended to drive the VTTIN pin.
Leave VREF-AC pin floating when not used. Please refer to the “Input Interface
Applications” section for more details.
27
VTH
Input logic threshold control voltage for logic control threshold settings other than
LVTTL/CMOS. This input control pin can be externally biased to set the proper
threshold for all the logic control pins, /RXEN, LBSEL, 3-bit equalization control, and
/RXLBEN. For standard LVTTL/CMOS control, simply leave the VTH pin floating
and the threshold voltage defaults to V
CC
/2 (When V
EE
= 0V). For LVPECL
thresholds, set VTH to V
CC
-1.3V.
TTL/CMOS (or VTH controlled) compatible control input for the RXQ output pair.
When pulled HIGH, the RXQ output pair is disabled. This input is internally
connected to a 25k
pull-down resistor and will default to a logic LOW state
(Enable) if left open. When disabled, the RXQ output goes LOW, and /RXQ output
goes HIGH. Default threshold is V
CC
/2 when VTH pin is floating.
TTL/CMOS (or VTH controlled) compatible control input for RXLBQ output pair.
When pulled HIGH, the RXLBQ output pair is disabled. This input is internally
connected to a 25k
pull-down resistor and will default to a logic LOW state
(Enable) if left open. When disabled, the RXLBQ output goes LOW, and /RXLBQ
output goes HIGH. Default threshold is V
CC
/2 when VTH pin is floating. In normal
operating mode, when the RXLBQ output pair is not needed, disable the RXLBQ
output pair (/RXLBEN = HIGH) to minimize noise.
23
/RXEN
15
/RXLBEN
10
LBSEL
Loopback MUX select control: The TTL/CMOS (or VTH controlled) compatible input
selects the input to the Loopback mode multiplexer. When LBSEL input is logic
HIGH, Loopback mode is selected, and the TXLBIN input pair is selected to pass
through the RXQ and RXLBQ output pairs. Note that the LBSEL pin is internally
connected to a 25k
pull-down resistor and will default to a logic LOW state if left
open (normal operation). The Loopback MUX includes internal input isolation to
minimize crosstalk.
11, 12
TXLBIN,
/TXLBIN
Loopback differential input pair: AC-coupled, CML-compatible input. This input pair
includes internal termination connected to an internal VBB for an AC-coupled bias
configuration. For local Loopback operation, the TXLBIN input pair receives a signal
from the SY58626L transmitter TXLBQ output pair. The input signal from TXLBIN
does not have any equalization. When the SY58627L Loopback mode is selected
(LBSEL = HIGH), the signal at TXLBIN is directed to the RXQ and RXLBQ output
pairs.
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