- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9663 > SY69753ALHG TR (Micrel Inc)IC CLOCK/DATA REC 125MBPS 32TQFP PDF資料下載
參數(shù)資料
| 型號： | SY69753ALHG TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK/DATA REC 125MBPS 32TQFP |
| 標準包裝： | 1,000 |
| 類型： | 時鐘和數(shù)據(jù)恢復（CDR），多路復用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，ATM OC-3 |
| 輸入： | PECL |
| 輸出： | PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 155Mbps |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP 裸露焊盤 |
| 供應商設(shè)備封裝： | 32-EPAD-TQFP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY69753ALHGTR SY69753ALHGTR-ND |
Micrel, Inc.
SY69753AL
August 2007
3
M9999-082107-E
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Inputs
Pin Number
Pin Name
Type
Pin Name
2
3
RDINP
RDINN
Differential
PECL
Serial Data Input: These built-in line receiver inputs are connected to the differential receive
serial data stream. An internal receive PLL recovers the embedded clock (RCLK) and data
(RDOUT) information.
5
REFCLK
TTL Input
Reference Clock: This input is used as the reference for the internal frequency synthesizer
and the "training" frequency for the receiver PLL to keep it centered in the absence of data
coming in on the RDIN inputs.
26
CD
PECL Input
Carrier Detect: This input controls the recovery function of the Receive PLL and can be driven
by the carrier detect output of optical modules or from external transition detection circuitry.
When this input is HIGH, the input data stream (RDIN) is recovered normally by the Receive
PLL. When this input is LOW the data on the inputs RDIN will be internally forced to a
constant LOW, the data outputs RDOUT will remain LOW, the Link Fault Indicator output
LFIN forced LOW and the clock recovery PLL forced to look onto the clock frequency
generated from REFCLK.
32
25
DIVSEL1
DIVSEL2
TTL Input
Divider Select: These inputs select the ratio between the output clock frequency
(RCLK/TCLK) and the REFCLK input frequency as shown in the “Reference Frequency
Selection” table.
16
CLKSEL
TTL Input
Clock Select: This input is used to select either the recovered clock of the receiver PLL
(CLKSEL = HIGH) or the clock of the frequency synthesizer (CLKSEL = LOW) to the TCLK
outputs.
Outputs
Pin Number
Pin Name
Type
Pin Name
31
LFIN
TTL Output
Link Fault Indicator: This output indicates the status of the input data stream RDIN. Active
HIGH signal is indicating when the internal clock recovery PLL has locked onto the incoming
data stream. LFIN will go HIGH if CD is HIGH and RDIN is within the frequency range of the
Receive PLL (1000ppm) and will be alternating if not. LFIN is an asynchronous output.
23
24
RDOUTN
RDOUTP
Differential
PECL
Receive Data Output: These ECL 100K outputs represent the recovered data from the input
data stream (RDIN). This recovered data is specified against the rising edge of RCLK.
20
21
RCLKN
RCLKP
Differential
PECL
Clock Output: These ECL 100K outputs represent the recovered clock used to sample the
recovered data (RDOUT).
18
17
TCLKP
TCLKN
Differential
PECL
Clock Output: These ECL 100K outputs represent either the recovered clock (CLKSEL =
HIGH) used to sample the recovered data (RDOUT) or the transmit clock of the frequency
synthesizer (CLKSEL = LOW).
9
10
PLLSP
PLLSN
Clock Synthesis PLL Loop Filter: External loop filter pins for the clock synthesis PLL.
14
15
PLLRN
PLLRP
Clock Recovery PLL Loop Filter: External loop filter pins for the receiver PLL.
Power and Ground
Pin Number
Pin Name
Type
Pin Name
27, 28
VCC
Power Supply.
(1)
29
30
VCCA
Analog Power Supply Voltage.
(1)
19, 22
VCCO
Output Supply Voltage.
(1)
12, 13
GND
Ground.
1, 4, 6, 7, 8
NC
No connect.
11
GNDA
Analog Ground.
Note:
1. VCC, VCCA, VCCO must be the same value.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-J01-MX-F2 | CONVERTER MOD DC/DC 12V 75W |
| ADN2807ACPZ-RL | IC CLOCK/DATA RECOVERY 48LFCSP |
| MS27484T24F2PA | CONN PLUG 100POS STRAIGHT W/PINS |
| VE-JTZ-EY-F4 | CONVERTER MOD DC/DC 2V 20W |
| MS3126E22-55PZ | CONN PLUG 55POS STRAIGHT W/PINS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY69753L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 125Mbps, 155Mbps Clock and Data Recovery |
| SY69753L_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 125Mbps, 155Mbps Clock and Data Recovery |
| SY69753L_07 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 125Mbps, 155Mbps Clock and Data Recovery |
| SY69753LHC | 功能描述:IC CLOCK/DATA RECVRY 3.3V 32TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| SY69753LHG | 功能描述:計時器和支持產(chǎn)品 3.3V 155 Mbps CDR (I Temp, Green/32 pin TQFP) RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。