參數(shù)資料
型號: SY69952A
廠商: Micrel Semiconductor,Inc.
英文描述: OC-3/STS-3 CLOCK RECOVERING TRANSCEIVER
中文描述: OC-3/STS-3鐘回收收發(fā)器
文件頁數(shù): 5/8頁
文件大小: 97K
代理商: SY69952A
SY69952A
5
Micrel
In addition, the SY69952A has a built-in transitions
detector that also checks the quality of the incoming data
stream. The absence of data transitions can be caused by
a broken transmission media, a broken transmitter, or a
problem with the transmit or receive media coupling. The
SY69952A will detect a quiet link by counting the number of
bits time that have passed without a data transition. A bit
time is defined as the period of RCLK
±
. When 512 bit times
have passed without a data transition on RIN
±
, /LFI will
transition LOW. The receiver will assume that the serial
data stream is invalid and, instead of allowing the RCLK
±
frequency to wander in the absence of data, the PLL will
lock to the REFCLK
×
8 frequency. This will insure that
RCLK
±
is as close to the correct link operating frequency
as the REFCLK
±
accuracy. /LFI will be driven HIGH again
and the receiver will recover clock and data from the
incoming data stream when the transition detection circuitry
determines that adequate transitions to ensure reliable clock
and data recovery have been detected within 512 bit-times.
The Transition Detector can be turned off by pulling the
CD input to a TTL LOW (
0.8V). When CD is pulled to a
TTL LOW the /LFI will only be driven LOW if the recovered
clock is not locked to the incoming data stream. LFI LOW in
this will only indicate that the Receiver PLL is Out of Lock
(OOL). The CD pin should not be left unconnected.
DESCRIPTION
Loop Back Testing
The TTL level /LOOP pin is used to perform loop-back
testing. When /LOOP is asserted (held LOW) the Transmitter
serial input (TSER
±
) is used by the Receiver PLL for clock
and data recovery. This allows in-system testing to be
performed on the entire device except for the differential
Transmit drivers (TOUT
±
) and the differential Receiver inputs
(RIN
±
). For example, an ATM controller can present ATM
cells to the input of the ATM cell processor and check to
see that these same cells are received. When the /LOOP
input is deasserted (held HIGH) the Receive PLL is once
again connected to the Receiver serial inputs (RIN
±
).
The /LOOP feature can also be used in applications where
clock and data recovery are to be performed from either of
two data streams. In these systems the /LOOP pin is used
to select whether the TSER
±
or the RIN
±
inputs are used
by the Receive PLL for clock and data recovery. In the
Loop back testing mode, regardless of the CD signal status
and the presence of data at the input (RIN
±
), the transmit
serial data stream from (TSER
±
) will flow through the
Receive PLL to the Recovered serial data output (RSER
±
).
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SY69952ZH 功能描述:計時器和支持產(chǎn)品 OC-3/STS-3 Clock Recovering Transceiver (Green) RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
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