- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9215 > SY89538LHY (Micrel Inc)IC SYNTH/FANOUT BUFFER 64-TQFP PDF資料下載
參數(shù)資料
| 型號： | SY89538LHY |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 11/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTH/FANOUT BUFFER 64-TQFP |
| 標準包裝： | 160 |
| 系列： | Precision Edge® |
| 類型： | 時鐘合成器/扇出緩沖器 |
| PLL： | 是 |
| 輸入： | CMOS，HSTL，LVDS，LVPECL，LVTTL，SSTL，晶體 |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:7 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 756MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-TQFP 裸露焊盤 |
| 供應商設備封裝： | 64-EP-TQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 1090 (CN2011-ZH PDF) |
| 其它名稱： | 576-2992 |
Micrel, Inc.
SY89538L
January 2008
M9999-010808-E
hbwhelp@micrel.com or (408) 955-1690
19
Figure 6 shows the open and closed loop gain of the
SY89538L. The closed loop-gain plot shows that the
SY89538L when configured with the recommended
loop filter values has essentially no jitter peaking near
the -3dB point. In addition, the open loop curve shows
the frequency at which unity gain occurs for a typical
case of the SY89538L with VCC = 3.3V at TA = 25°C.
At unity gain, Figure 7 can be used to determine the
phase margin or stability of the SY89538L.
Figure 6. Open and Closed Loop Gain
at VCC = 3.3V, TA = 25°C
Figure 7. Phase Margin Plot
at VCC = 3.3V, TA = 25°C
Figure 8 illustrates the VCO frequency versus the loop
filter control voltage at 3.3V, TA = 25°C. The normal
loop filter control voltage is -300mV to +300mV.
Figure 9 illustrates the VCO gain curve at VCC = 3.3V,
TA = 25°C. With this set of information, determining
the loop stability with other sets of loop filter
configurations is possible.
Figure 8. Loop Filter Control Voltage vs.
Frequency at 3.3V, TA = 25°C
Figure 9. Frequency vs.
Loop Filter Control Voltage at 3.3V, TA = 25°C
Input Interface
RFCK and FBIN are designed to accept any
differential or single-ended input signal 300mV above
VCC or 300mV below GND. RFCK and FBIN should
not be left floating. Tie either the true or complement
input to GND, but not both. A logic zero is achieved by
connecting the complement input to GND with the true
input floating. For TTL input, tie a 2.5k resistor
between the complement input and GND. LVDS, CML
and HSTL differential signals may be connected
directly to the reference inputs.
Figure 10. Simplified Input Structure
dB
Phase
M
argin
(
°)
Frequency (Hz)
相關PDF資料 |
PDF描述 |
|---|---|
| VI-JVJ-MZ-S | CONVERTER MOD DC/DC 36V 25W |
| VI-J4N-MZ-S | CONVERTER MOD DC/DC 18.5V 25W |
| VE-20H-MX-B1 | CONVERTER MOD DC/DC 52V 75W |
| VI-21L-MY-F3 | CONVERTER MOD DC/DC 28V 50W |
| VI-JV4-MZ-S | CONVERTER MOD DC/DC 48V 25W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SY89538LHY TR | 功能描述:時鐘合成器/抖動清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer |
| SY89538LHZ | 功能描述:時鐘合成器/抖動清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHZ TR | 功能描述:時鐘合成器/抖動清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHZTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer |
發(fā)布緊急采購，3分鐘左右您將得到回復。