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參數(shù)資料
| 型號： | SY89538LHY |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 2/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTH/FANOUT BUFFER 64-TQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | Precision Edge® |
| 類型： | 時鐘合成器/扇出緩沖器 |
| PLL： | 是 |
| 輸入： | CMOS，HSTL，LVDS，LVPECL，LVTTL，SSTL，晶體 |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:7 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 756MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 64-EP-TQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 1090 (CN2011-ZH PDF) |
| 其它名稱： | 576-2992 |
Micrel, Inc.
SY89538L
January 2008
M9999-010808-E
hbwhelp@micrel.com or (408) 955-1690
10
AC Electrical Characteristics
VCCA = VCCD = +3.3V ±10%; VCCO = +2.5V ±5% or +3.3V ±10%, RL (LVDS) = 100 across the output pairs, RL
(LVPECL) = 50 into VCCO–2V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
XTAL Input Frequency Range
Note 7
14
18
MHz
Reference Input Frequency Range
See Table 8
9.325
756
MHz
fIN
Zero Delay Input Frequency Range
See Table 9
29.375
756
MHz
INSEL = LOW
9.325
94.5
MHz
fREF
Phase Detector Operating
Frequency Range
INSEL = HIGH
14
18
MHz
fOUT
Output Frequency Range
29.375
756
MHz
fVCO
Internal VCO Frequency Range
2352
3024
MHz
tSKEW
Output-to-Output
Note 8
15
75
ps
tLOCK
Minimum PLL Lock Time
10
ms
Loop Filter Optimized for Cycle-to-Cycle Jitter
R = 50
C1 = 0.47F
C2 = 1000pF
Note 9
4
6
psRMS
Note 9
5
14
psRMS
Note 10
80
150
psPP
1-Sigma Cycle-to-Cycle Jitter (XTAL Input)
1-Sigma Cycle-to-Cycle Jitter (RFCK Reference)
Total Jitter
Spur
-35
dBc@
fphase
tJITTER
XTAL/RFCK Crosstalk-Induced Jitter
Note 11
0.7
psRMS
BW
PLL Bandwidth
See Table 10
14 ≤ fREF ≤ 18
11.1
38.4
kHz
tDC
FOUT Duty Cycle
43
50
57
%
tr, tf
Output Rise/Fall Time (20% to 80%)
LVPECL
100
250
400
ps
Output Rise/Fall Time (20% to 80%)
LVDS
80
150
300
ps
tPW_SYNC_MIN
Minimum SYNC Pulse Width
See “Synchronization”
section
8
Internal
clock
cycle
tPD_SYNC
Synchronization Delay
See “Synchronization”
section
8
Internal
clock
cycle
Notes:
7.
Fundamental mode, series resonant crystal.
8.
The output-to-output skew is defined as the worst-case difference between any outputs within a single device operating at the same voltage
and temperature.
9.
Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
10. Total jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10
12 output edges will deviate by more
than the specified peak-to-peak jitter value.
11. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each
other at the inputs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89538LHY TR | 功能描述:時鐘合成器/抖動清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer |
| SY89538LHZ | 功能描述:時鐘合成器/抖動清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHZ TR | 功能描述:時鐘合成器/抖動清除器 3.3V LVPECL/LVDS Clock Synthesizer System (I Temp, Lead Free) RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SY89538LHZTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer |
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