參數(shù)資料
型號(hào): SYS82000RKXCLI-10
元件分類: SRAM
英文描述: 2M X 8 MULTI DEVICE SRAM MODULE, 100 ns, PSMA38
封裝: PLASTIC, MODULE, SIP-38
文件頁(yè)數(shù): 4/7頁(yè)
文件大?。?/td> 478K
代理商: SYS82000RKXCLI-10
ISSUE 1.2 : January 1999
SYS82000RKXC - 70/85/10/12
4
Read Cycle
-70
-85
-10
-12
Parameter
Symbol
min
max
min
max
min
max
min
max
Unit
Read Cycle Time
t
RC
70
-
85
-
100
-
120
-
ns
Address Access Time
t
AA
-
70
-
85
-
100
-
120
ns
Chip Select Access Time
t
ACS
-
70
-
85
-
100
-
120
ns
Output Enable to Output Valid
t
OE
-40
-
45
-50
-
55
ns
Output Hold from Address Change
t
OH
10
-
10
-
10
-
10
-
ns
Chip Selection to Output in Low Z
t
CLZ
10
-
10
-
10
-
10
-
ns
Output Enable to Output in Low Z
t
OLZ
5
-
5-
ns
Chip Deselection to O/P in High Z
t
CHZ
030030
0
35040
ns
Output Disable to Output in High Z
t
OHZ
030030
0
35040
ns
AC OPERATING CONDITIONS
Write Cycle
-70
-85
-10
-12
Parameter
Symbol
min
max
min
max
min
max
min
max
Unit
Write Cycle Time
t
WC
70
-
85
-
100
-
120
-
ns
Chip Selection to End of Write
t
CW
60
-
75
-
80
-
100
-
ns
Address Setup Time
t
AS
0
-
0-
ns
Address Valid to End of Write
t
AW
60
-
75
-
80
-
100
-
ns
Write Pulse Width
t
WP
55
-
65
-
70
-
80
-
ns
Write Recovery Time
t
WR
5
-
5-
ns
Write to Output in High Z
t
WHZ
025030
0
35040
ns
Data to Write Time Overlap
t
DW
30
-
35
-
40
-
45
-
ns
Data Hold from Write Time
t
DH
0
-
0-
ns
Output active from end of write
t
OW
5
-
5-
ns
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