參數(shù)資料
型號(hào): T436416A-8S
廠商: TM Technology, Inc.
英文描述: 4M X 16 SDRAM
中文描述: 4米× 16內(nèi)存
文件頁(yè)數(shù): 8/29頁(yè)
文件大小: 712K
代理商: T436416A-8S
TE
CH
tm
AC CHARACTERISTICS
(AC opterating conditions unless otherwise noted)
T436416A
TM Technology Inc. reserves the right
P.8
to change products or specifications without notice.
Publication Date: MAY. 2003
Revision: B
-6
-7
-7.5
-8
-10
Parameter
Symbol
Min Max Min Max Min Max Min Max Min Max
Unit Note
6
1K
7
1K 7.5 1K
CAS Latency = 3
8
1K 10 1K
CLK cycle time
CAS Latency = 2
t
CC
8
9
9
10
10
ns
1
CAS Latency = 3
-
5.5
-
6
6
-
6
-
7
ns
CLK to valid
Output delay
CAS Latency = 2
t
SAC
-
6
-
6
6
-
7
-
9
ns
1
Output data hold time
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
2
2.5
2.5
2.5
2.5
ns
2
CLK high pulse width
2
2.5
2.5
3
3
ns
3
CLK low pulse width
2
2.5
2.5
3
3
ns
3
Input setup time
1.5
1.75
1.75
2
2.5
ns
3
Input hold time
1
1
1
1
1
ns
3
CLK to output in Low-Z
1
1
1
1
1
ns
2
CAS Latency = 3
-
5.5
-
6
6
-
6
-
7
ns
CLK to output in
Hi-Z
CAS Latency = 2
t
SHZ
-
6
-
6
6
-
7
-
9
ns
Note:
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns,transient time compensation should be considered,
i.e.,[(tr+tf)/2-1]ns should be added to the parameter.
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