參數(shù)資料
型號(hào): T7502
元件分類: Codec
英文描述: T7502 Dual PCM Codec with Filters
中文描述: T7502雙PCM編解碼器與濾波器
文件頁數(shù): 1/16頁
文件大?。?/td> 417K
代理商: T7502
Data Sheet
February 1998
T7502 Dual PCM Codec with Filters
Features
I
+5 V only
I
Automatic powerdown mode
I
Low-power, latch-up-free CMOS technology
I
On-chip sample and hold, autozero, and precision
voltage reference
I
Differential architecture for high noise immunity
and power supply rejection
I
Automatic master clock frequency selection
I
2.048 MHz or 4.096 MHz fixed data rate
I
Frame sync controlled channel swapping
I
Differential analog I/O
I
300
output drivers
I
Operating temperature range: –40
°
C to +85
°
C
I
A-law companding
Applications
I
Speakerphone
I
Telephone answering device (TAD)
I
POTS for ISDN
Description
The T7502 device is a single-chip, two-channel
A-law PCM codec with filters. This integrated circuit
provides analog-to-digital and digital-to-analog
conversion. It provides the transmit and receive
filtering necessary to interface a voice telephone
circuit to a time-division multiplexed (TDM) system.
The device features a differential transmit amplifier,
and the power receive amplifier is capable of driving
600
differentially. PCM timing is defined by a single
frame sync pulse. This device operates in a delayed
timing mode (digital data is valid one clock cycle after
frame sync goes high). The T7502 is packaged in a
20-pin SOJ.
Figure 1. Block Diagram
5-3609.b
GS
X
0
VF
X
IN0
VF
R
OP0
GS
X
1
VF
X
IN1
VF
X
IP1
VCM1
VF
R
OP1
VF
R
ON1
+
FILTER
NETWORK
ENCODER
CHANNEL 0
+2.4 V
DECODER
PCM
INTERFACE
POWERDOWN
CONTROL
INTERNAL TIMING
& CONTROL
BIAS
CIRCUITRY
&
REFERENCE
CHANNEL 1
FILTER
NETWORK
D
X
D
R
GNDD
MCLK
V
DD
(1)
VF
X
IP0
VCM0
VF
R
ON0
FS
GNDA (2)
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